[H7][LIB][SDMMC] Workaround for SDMMC Errata 2.11.4
Application of
STM32H750 - Apply workaround to the SDMMC Errata 2.11.4 (8446832
)
to V1.4.0
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@ -448,6 +448,17 @@ HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef*
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Data->TransferMode |\
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Data->DPSM);
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// DC - See errata 2.11.4 - 8 SDMMC clock cycles must elapse before DTEN can be set.
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// 32U below is used as a VERY rough guess that the SDMMC clock is 1/4 of the sytem clock, 8 * 4 = 32 and that the
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// assembly below only takes 1 CPU cycle to run. All of which will be wrong, but right enough most of the time, especially
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// when considering other processing overheads.
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register uint32_t count = 32U;
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do
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{
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count--;
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} while(count > 0);
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// DC - See errata 2.11.4
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/* Write to SDMMC DCTRL */
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MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
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@ -86,7 +86,6 @@ EXCLUDES = \
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stm32h7xx_ll_rcc.c \
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stm32h7xx_ll_rng.c \
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stm32h7xx_ll_rtc.c \
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stm32h7xx_ll_sdmmc.c \
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stm32h7xx_ll_spi.c \
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stm32h7xx_ll_swpmi.c \
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stm32h7xx_ll_tim.c \
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