[H7][LIB][SDMMC] Workaround for SDMMC Errata 2.11.4

Application of

STM32H750 - Apply workaround to the SDMMC Errata 2.11.4 (8446832)

to V1.4.0
This commit is contained in:
jflyper 2019-06-24 21:24:21 +09:00
parent 41f7c0c5fd
commit d924e59c3c
2 changed files with 11 additions and 1 deletions

View File

@ -448,6 +448,17 @@ HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef*
Data->TransferMode |\
Data->DPSM);
// DC - See errata 2.11.4 - 8 SDMMC clock cycles must elapse before DTEN can be set.
// 32U below is used as a VERY rough guess that the SDMMC clock is 1/4 of the sytem clock, 8 * 4 = 32 and that the
// assembly below only takes 1 CPU cycle to run. All of which will be wrong, but right enough most of the time, especially
// when considering other processing overheads.
register uint32_t count = 32U;
do
{
count--;
} while(count > 0);
// DC - See errata 2.11.4
/* Write to SDMMC DCTRL */
MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);

View File

@ -86,7 +86,6 @@ EXCLUDES = \
stm32h7xx_ll_rcc.c \
stm32h7xx_ll_rng.c \
stm32h7xx_ll_rtc.c \
stm32h7xx_ll_sdmmc.c \
stm32h7xx_ll_spi.c \
stm32h7xx_ll_swpmi.c \
stm32h7xx_ll_tim.c \