* Moved ART Prefetch enabling from library to main code
* Fixed tabs to spaces
* Added F7 LL EX header to simplify work with DMA and TIM
* Refactored F7 DSHOT using LL EX
* Got rid of overlooked duplicate lines
* Revert "Revert "Rewritten F7 dshot to LL (draft)" (#5430)"
This reverts commit aa42a69d2f.
* Reworked F7 linker scripts to maximize performance of both F74x and F72x
* Some comments and changes from original F7 HAL DSHOT
* Prohibit inlining of some functions to place them in ITCM-RAM
* Fixed usartTargetConfigure implicit declaration
* Moved back to SRAM1 as main RAM
* Added SRAM2 attribute
* Fixed LL DSHOT FOR SPRF7DUAL and probably other adv TIM users
* Fixed SPRF7DUAL rev. A motor order
* Enabled CCM for data on F40x
* Fixed F7 startup assembly symbols
* Fixed KISSFCV2F7 linker script
* Added a quick way of building F7 targets only
* Got rid of the useless F7 target script
* Added NOINLINE and got rid of useless __APPLE__ define
* Added some important functions to ITCM
* Added NOINLINE macro for tests
* Copy to ITCM before passing execution into it
* Minimized cache footprint of motor output code
* Evicted low-impact functions from ITCM
* Switched MATEKF722 and SPRACINGF7DUAL to burst DSHOT
* Switched CLRACINGF7 to burst DSHOT
* Moved UART RX&TX buffers to DTCM-RAM to avoid cache incoherency
* Marked taskMainPidLoop for ITCM-RAM, disallowed inlining per-function
* Revert "Added a quick way of building F7 targets only"
This reverts commit 22945189980deaf493be54a5056a080e7edad629.
* CF/BF - Update DSP_Lib and STM32F7/Drivers/CMSIS to CMSIS 5.3.0.
CMSIS 5.3.0 - https://github.com/ARM-software/CMSIS_5/releases/tag/5.3.0
* cleanup lib.
* pfft
* relocate driver files from lib/main/CMSIS/CM* to lib/main/STM32xx
folders
* Move DSP folder inside CM5.
It came from the same source as the other files inside CM5
* Remove the CM5 folder and move the files in it one level up.
Andrey Mironov
Dominic Clifton
blckmn