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Define on build-time some basic limits for this hardware 

Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
This commit is contained in:
Marcos Chaparro 2019-01-10 18:22:47 -03:00
parent 726c8302ef
commit 95d8f70f87
1 changed files with 9 additions and 9 deletions
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18
hwconf/hw_palta.h
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@ -219,15 +219,15 @@
#define MCCONF_FOC_SAMPLE_V0_V7 true // Run control loop in both v0 and v7 (requires phase shunts)
#endif
// Setting limits (TODO: Configure these)
//#define HW_LIM_CURRENT -100.0, 100.0
//#define HW_LIM_CURRENT_IN -100.0, 100.0
//#define HW_LIM_CURRENT_ABS 0.0, 150.0
//#define HW_LIM_VIN 6.0, 57.0
//#define HW_LIM_ERPM -200e3, 200e3
//#define HW_LIM_DUTY_MIN 0.0, 0.1
//#define HW_LIM_DUTY_MAX 0.0, 1.0
//#define HW_LIM_TEMP_FET -40.0, 110.0
// Setting limits
#define HW_LIM_CURRENT -200.0, 200.0
#define HW_LIM_CURRENT_IN -100.0, 100.0
#define HW_LIM_CURRENT_ABS 0.0, 230.0
#define HW_LIM_VIN 6.0, 85.0
#define HW_LIM_ERPM -100e3, 100e3
#define HW_LIM_DUTY_MIN 0.0, 0.1
#define HW_LIM_DUTY_MAX 0.0, 1.0
#define HW_LIM_TEMP_FET -40.0, 110.0
// HW-specific functions
char hw_palta_configure_FPGA(void);