Adds support for A200S V4.1
Move A200S V4 to its own folder.
Expose I2C for LSM6DS3 to allow other devices on the same I2C bus. (It is now setup the same as the other IMUs)
Add alternative DC Calibration routine for Low side shunt hardware with very high mosfet output capacitance. The usual calibration routine causes an offset in the current calibration at high voltage from the capacitance discharging through the motor inductance when the single phase goes low. The alternative routine switches all phases at 50% to give a clean V0 state. This routine should not be run while the motor is spinning, so automatic calibration on startup is disabled when this routine is selected.
According to datasheet, these are the bits of the CTRL8_XL register:
7: LPF2_XL_EN
6: HPCF_XL1
5: HPCF_XL0
4: HP_REF_MODE
3: INPUT_COMPOSITE
2: HP_SLOPE_XL_EN
1: 0
0: LOW_PASS_ON_6D
The code was setting bits 6 and 5, while according to the define names
and comments, it intended to set bit 7 (LPF2_XL_EN = 0b1) and bit 6
(HPCF_XL = 0b10).
The i2c_bb_tx_rx() function was transmitting only the register address,
not the value to set, resulting in only reading the value.
Also adds a missing return value check for one of the calls.
Hardware filtering functionality imported from tested 5.3v6 release.
TR-C variant has highly configurable filtering, this patch
implements a basic ODR/4 or ODR/9 filtering for the common IMU
sampling rates (400Hz..1600Hz)
IMU_FILTER_LOW: ODR/2 (same as standard fw6.0 behavior)
IMU_FILTER_MEDIUM: ODR/4 lowpass filtering
IMu_FILTER_HIGH: ODR/9 filtering (default in fw5.3v6 release)
Signed-off-by: Dado Mista <dadomista@gmail.com>
VESC tool allows users to set IMU update frequency up to 1khz, but if the BMI160 output data rate is only 200hz, then this option is useless (and performance at 1khz is much better than 200hz).