mirror of https://github.com/rusefi/bldc.git
121 lines
3.1 KiB
C
121 lines
3.1 KiB
C
/*
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Copyright 2012-2015 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* encoder.c
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*
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* Created on: 7 mar 2015
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* Author: benjamin
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*/
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#include "encoder.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "hw.h"
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// Private variables
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static bool index_found;
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static uint32_t enc_counts = 10000;
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void encoder_init(uint32_t counts) {
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EXTI_InitTypeDef EXTI_InitStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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// Initialize variables
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index_found = false;
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enc_counts = counts;
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1,
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PAL_MODE_ALTERNATE(HW_ENC_TIM_AF) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2,
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PAL_MODE_ALTERNATE(HW_ENC_TIM_AF) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Enable timer clock
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HW_ENC_TIM_CLK_EN();
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// Enable SYSCFG clock
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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TIM_EncoderInterfaceConfig (HW_ENC_TIM, TIM_EncoderMode_TI12,
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TIM_ICPolarity_Rising,
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TIM_ICPolarity_Rising);
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TIM_SetAutoreload(HW_ENC_TIM, enc_counts - 1);
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TIM_Cmd (HW_ENC_TIM, ENABLE);
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// Interrupt on index pulse
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// Connect EXTI Line to pin
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SYSCFG_EXTILineConfig(HW_ENC_EXTI_PORTSRC, HW_ENC_EXTI_PINSRC);
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// Configure EXTI Line
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EXTI_InitStructure.EXTI_Line = HW_ENC_EXTI_LINE;
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EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
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EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
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EXTI_InitStructure.EXTI_LineCmd = ENABLE;
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EXTI_Init(&EXTI_InitStructure);
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// Enable and set EXTI Line Interrupt to the highest priority
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NVIC_InitStructure.NVIC_IRQChannel = HW_ENC_EXTI_CH;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x00;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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float encoder_read_deg(void) {
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return ((float)HW_ENC_TIM->CNT * 360.0) / (float)enc_counts;
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}
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/**
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* Reset the encoder counter. Should be called from the index interrupt.
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*/
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void encoder_reset(void) {
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HW_ENC_TIM->CNT = 0;
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index_found = true;
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}
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/**
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* Set the number of encoder counts.
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*
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* @param counts
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* The number of encoder counts
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*/
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void encoder_set_counts(uint32_t counts) {
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if (counts != enc_counts) {
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enc_counts = counts;
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TIM_SetAutoreload(HW_ENC_TIM, enc_counts - 1);
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index_found = false;
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}
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}
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/**
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* Check if the index pulse is found.
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*
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* @return
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* True if the index is found, false otherwise.
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*/
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bool encoder_index_found(void) {
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return index_found;
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}
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