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10
Makefile
10
Makefile
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@ -97,8 +97,8 @@ include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
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# RTOS files (optional).
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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# Other files (optional).
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include $(CHIBIOS)/os/hal/lib/streams/streams.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/os/various/shell/shell.mk
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# Define linker script file here
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# Define linker script file here
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LDSCRIPT= STM32F407xG.ld
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LDSCRIPT= STM32F407xG.ld
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@ -112,9 +112,7 @@ CSRC = $(PORTSRC) \
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$(OSALSRC) \
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$(OSALSRC) \
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$(PLATFORMSRC) \
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$(PLATFORMSRC) \
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$(BOARDSRC) \
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$(BOARDSRC) \
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$(CHIBIOS)/os/various/shell.c \
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$(SHELLSRC) \
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$(CHIBIOS)/os/hal/lib/streams/memstreams.c \
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$(CHIBIOS)/os/hal/lib/streams/chprintf.c \
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usbcfg.c main.c
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usbcfg.c main.c
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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@ -228,7 +226,7 @@ DLIBS = -lm
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#
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#
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# List all user C define here, like -D_DEBUG=1
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# List all user C define here, like -D_DEBUG=1
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UDEFS =
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UDEFS = -DSHELL_CMD_TEST_ENABLED=0
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# Define ASM defines here
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# Define ASM defines here
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UADEFS =
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UADEFS =
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227
halconf.h
227
halconf.h
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@ -1,5 +1,5 @@
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/*
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/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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you may not use this file except in compliance with the License.
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@ -25,8 +25,11 @@
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* @{
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* @{
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*/
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*/
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#ifndef _HALCONF_H_
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#ifndef HALCONF_H
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#define _HALCONF_H_
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#define HALCONF_H
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#define _CHIBIOS_HAL_CONF_
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#define _CHIBIOS_HAL_CONF_VER_7_1_
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#include "mcuconf.h"
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#include "mcuconf.h"
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@ -52,10 +55,24 @@
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#endif
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#endif
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/**
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/**
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* @brief Enables the EXT subsystem.
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* @brief Enables the cryptographic subsystem.
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*/
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*/
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#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
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#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
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#define HAL_USE_EXT FALSE
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#define HAL_USE_CRY FALSE
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#endif
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/**
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* @brief Enables the DAC subsystem.
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*/
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#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
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#define HAL_USE_DAC FALSE
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#endif
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/**
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* @brief Enables the EFlash subsystem.
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*/
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#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
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#define HAL_USE_EFL FALSE
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#endif
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#endif
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/**
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/**
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@ -104,7 +121,7 @@
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* @brief Enables the PWM subsystem.
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* @brief Enables the PWM subsystem.
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*/
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*/
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#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
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#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
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#define HAL_USE_PWM TRUE
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#define HAL_USE_PWM FALSE
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#endif
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#endif
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/**
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/**
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@ -135,11 +152,25 @@
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#define HAL_USE_SERIAL_USB TRUE
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#define HAL_USE_SERIAL_USB TRUE
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#endif
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#endif
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/**
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* @brief Enables the SIO subsystem.
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*/
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#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
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#define HAL_USE_SIO FALSE
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#endif
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/**
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/**
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* @brief Enables the SPI subsystem.
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* @brief Enables the SPI subsystem.
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*/
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*/
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#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
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#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
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#define HAL_USE_SPI TRUE
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#define HAL_USE_SPI FALSE
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#endif
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/**
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* @brief Enables the TRNG subsystem.
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*/
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#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
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#define HAL_USE_TRNG FALSE
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#endif
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#endif
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/**
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/**
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@ -156,6 +187,40 @@
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#define HAL_USE_USB TRUE
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#define HAL_USE_USB TRUE
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#endif
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#endif
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/**
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* @brief Enables the WDG subsystem.
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*/
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#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
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#define HAL_USE_WDG FALSE
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#endif
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/**
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* @brief Enables the WSPI subsystem.
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*/
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#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
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#define HAL_USE_WSPI FALSE
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#endif
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/*===========================================================================*/
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/* PAL driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
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#define PAL_USE_CALLBACKS FALSE
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#endif
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
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#define PAL_USE_WAIT FALSE
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* ADC driver related settings. */
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/* ADC driver related settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -187,6 +252,55 @@
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#define CAN_USE_SLEEP_MODE TRUE
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#define CAN_USE_SLEEP_MODE TRUE
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#endif
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#endif
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/**
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* @brief Enforces the driver to use direct callbacks rather than OSAL events.
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*/
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#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
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#define CAN_ENFORCE_USE_CALLBACKS FALSE
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#endif
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/*===========================================================================*/
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/* CRY driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables the SW fall-back of the cryptographic driver.
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* @details When enabled, this option, activates a fall-back software
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* implementation for algorithms not supported by the underlying
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* hardware.
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* @note Fall-back implementations may not be present for all algorithms.
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*/
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#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
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#define HAL_CRY_USE_FALLBACK FALSE
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#endif
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/**
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* @brief Makes the driver forcibly use the fall-back implementations.
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*/
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#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
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#define HAL_CRY_ENFORCE_FALLBACK FALSE
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#endif
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/*===========================================================================*/
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/* DAC driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
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#define DAC_USE_WAIT TRUE
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#endif
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/**
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* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define DAC_USE_MUTUAL_EXCLUSION TRUE
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* I2C driver related settings. */
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/* I2C driver related settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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/**
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* @brief Enables an event sources for incoming packets.
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* @brief Enables the zero-copy API.
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*/
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*/
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#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
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#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
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#define MAC_USE_ZERO_COPY FALSE
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#define MAC_USE_ZERO_COPY FALSE
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#define SDC_NICE_WAITING TRUE
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#define SDC_NICE_WAITING TRUE
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#endif
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#endif
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/**
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* @brief OCR initialization constant for V20 cards.
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*/
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#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
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#define SDC_INIT_OCR_V20 0x50FF8000U
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#endif
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/**
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* @brief OCR initialization constant for non-V20 cards.
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*/
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#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
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#define SDC_INIT_OCR 0x80100000U
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* SERIAL driver related settings. */
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/* SERIAL driver related settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -280,7 +408,7 @@
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* @brief Serial buffers size.
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* @brief Serial buffers size.
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* @details Configuration parameter, you can change the depth of the queue
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* @details Configuration parameter, you can change the depth of the queue
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* buffers depending on the requirements of your application.
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* buffers depending on the requirements of your application.
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* @note The default is 64 bytes for both the transmission and receive
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* @note The default is 16 bytes for both the transmission and receive
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* buffers.
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* buffers.
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*/
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*/
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#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
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#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
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@ -295,13 +423,21 @@
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* @brief Serial over USB buffers size.
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* @brief Serial over USB buffers size.
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* @details Configuration parameter, the buffer size must be a multiple of
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* @details Configuration parameter, the buffer size must be a multiple of
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* the USB data endpoint maximum packet size.
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* the USB data endpoint maximum packet size.
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* @note The default is 64 bytes for both the transmission and receive
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* @note The default is 256 bytes for both the transmission and receive
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* buffers.
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* buffers.
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*/
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*/
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#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
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#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
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#define SERIAL_USB_BUFFERS_SIZE 256
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#define SERIAL_USB_BUFFERS_SIZE 256
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#endif
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#endif
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/**
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* @brief Serial over USB number of buffers.
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* @note The default is 2 buffers.
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*/
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#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
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#define SERIAL_USB_BUFFERS_NUMBER 2
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* SPI driver related settings. */
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/* SPI driver related settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -314,6 +450,14 @@
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#define SPI_USE_WAIT TRUE
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#define SPI_USE_WAIT TRUE
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#endif
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#endif
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/**
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* @brief Enables circular transfers APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
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#define SPI_USE_CIRCULAR FALSE
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#endif
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/**
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/**
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* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
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* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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* @note Disabling this option saves both code and data space.
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@ -323,12 +467,65 @@
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#endif
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#endif
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/**
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/**
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* elua
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* @brief Handling method for SPI CS line.
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* @note Disabling this option saves both code and data space.
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*/
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*/
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//~ #define CHIBILUA_SERIAL 1
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#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
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#define CHIBILUA_USBSERIAL 1
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#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
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#endif
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/*===========================================================================*/
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/* UART driver related settings. */
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/*===========================================================================*/
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#endif /* _HALCONF_H_ */
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
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#define UART_USE_WAIT FALSE
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#endif
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/**
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* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define UART_USE_MUTUAL_EXCLUSION FALSE
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#endif
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/*===========================================================================*/
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/* USB driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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||||||
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* @note Disabling this option saves both code and data space.
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||||||
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*/
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||||||
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#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
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#define USB_USE_WAIT FALSE
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#endif
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/*===========================================================================*/
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/* WSPI driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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||||||
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*/
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#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
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#define WSPI_USE_WAIT TRUE
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#endif
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/**
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* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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||||||
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*/
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#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define WSPI_USE_MUTUAL_EXCLUSION TRUE
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#endif
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#endif /* HALCONF_H */
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/** @} */
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/** @} */
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|
100
main.c
100
main.c
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@ -16,11 +16,9 @@
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|
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#include "ch.h"
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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#include "test.h"
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|
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#include "chprintf.h"
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#include "chprintf.h"
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#include "various/shell.h"
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#include "shell.h"
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#include "lis302dl.h"
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|
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|
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#include "usbcfg.h"
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#include "usbcfg.h"
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@ -43,9 +41,7 @@ static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
|
||||||
chprintf(chp, "Usage: mem\r\n");
|
chprintf(chp, "Usage: mem\r\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
n = chHeapStatus(NULL, &size);
|
|
||||||
chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX());
|
chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX());
|
||||||
chprintf(chp, "heap fragments : %u\r\n", n);
|
|
||||||
chprintf(chp, "heap free total : %u bytes\r\n", size);
|
chprintf(chp, "heap free total : %u bytes\r\n", size);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -61,35 +57,13 @@ static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
|
||||||
chprintf(chp, " addr stack prio refs state\r\n");
|
chprintf(chp, " addr stack prio refs state\r\n");
|
||||||
tp = chRegFirstThread();
|
tp = chRegFirstThread();
|
||||||
do {
|
do {
|
||||||
chprintf(chp, "%08lx %08lx %4lu %4lu %9s\r\n",
|
|
||||||
(uint32_t)tp, (uint32_t)tp->p_ctx.r13,
|
|
||||||
(uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
|
|
||||||
states[tp->p_state]);
|
|
||||||
tp = chRegNextThread(tp);
|
tp = chRegNextThread(tp);
|
||||||
} while (tp != NULL);
|
} while (tp != NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
|
|
||||||
thread_t *tp;
|
|
||||||
|
|
||||||
(void)argv;
|
|
||||||
if (argc > 0) {
|
|
||||||
chprintf(chp, "Usage: test\r\n");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),
|
|
||||||
TestThread, chp);
|
|
||||||
if (tp == NULL) {
|
|
||||||
chprintf(chp, "out of memory\r\n");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
chThdWait(tp);
|
|
||||||
}
|
|
||||||
|
|
||||||
static const ShellCommand commands[] = {
|
static const ShellCommand commands[] = {
|
||||||
{"mem", cmd_mem},
|
{"mem", cmd_mem},
|
||||||
{"threads", cmd_threads},
|
{"threads", cmd_threads},
|
||||||
{"test", cmd_test},
|
|
||||||
{NULL, NULL}
|
{NULL, NULL}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -102,55 +76,9 @@ static const ShellConfig shell_cfg1 = {
|
||||||
/* Accelerometer related. */
|
/* Accelerometer related. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
/*
|
|
||||||
* PWM configuration structure.
|
|
||||||
* Cyclic callback enabled, channels 1 and 4 enabled without callbacks,
|
|
||||||
* the active state is a logic one.
|
|
||||||
*/
|
|
||||||
static const PWMConfig pwmcfg = {
|
|
||||||
100000, /* 100kHz PWM clock frequency. */
|
|
||||||
128, /* PWM period is 128 cycles. */
|
|
||||||
NULL,
|
|
||||||
{
|
|
||||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
|
||||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
|
||||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
|
||||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
|
|
||||||
},
|
|
||||||
/* HW dependent part.*/
|
|
||||||
0,
|
|
||||||
0
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SPI1 configuration structure.
|
* This is a periodic thread that reads accelerometer and outputs.
|
||||||
* Speed 5.25MHz, CPHA=1, CPOL=1, 8bits frames, MSb transmitted first.
|
|
||||||
* The slave select line is the pin GPIOE_CS_SPI on the port GPIOE.
|
|
||||||
*/
|
|
||||||
static const SPIConfig spi1cfg = {
|
|
||||||
NULL,
|
|
||||||
/* HW dependent part.*/
|
|
||||||
GPIOE,
|
|
||||||
GPIOE_CS_SPI,
|
|
||||||
SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_CPOL | SPI_CR1_CPHA
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* SPI2 configuration structure.
|
|
||||||
* Speed 21MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first.
|
|
||||||
* The slave select line is the pin 12 on the port GPIOA.
|
|
||||||
*/
|
|
||||||
static const SPIConfig spi2cfg = {
|
|
||||||
NULL,
|
|
||||||
/* HW dependent part.*/
|
|
||||||
GPIOB,
|
|
||||||
12,
|
|
||||||
0
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This is a periodic thread that reads accelerometer and outputs
|
|
||||||
* result to SPI2 and PWM.
|
|
||||||
*/
|
*/
|
||||||
static THD_WORKING_AREA(waThread1, 128);
|
static THD_WORKING_AREA(waThread1, 128);
|
||||||
static THD_FUNCTION(Thread1, arg) {
|
static THD_FUNCTION(Thread1, arg) {
|
||||||
|
@ -160,10 +88,6 @@ static THD_FUNCTION(Thread1, arg) {
|
||||||
(void)arg;
|
(void)arg;
|
||||||
chRegSetThreadName("reader");
|
chRegSetThreadName("reader");
|
||||||
|
|
||||||
/* LIS302DL initialization.*/
|
|
||||||
lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG1, 0x43);
|
|
||||||
lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG2, 0x00);
|
|
||||||
lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG3, 0x00);
|
|
||||||
|
|
||||||
/* Reader thread loop.*/
|
/* Reader thread loop.*/
|
||||||
time = chVTGetSystemTime();
|
time = chVTGetSystemTime();
|
||||||
|
@ -177,15 +101,6 @@ static THD_FUNCTION(Thread1, arg) {
|
||||||
ybuf[i] = ybuf[i - 1];
|
ybuf[i] = ybuf[i - 1];
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Reading MEMS accelerometer X and Y registers.*/
|
|
||||||
xbuf[0] = (int8_t)lis302dlReadRegister(&SPID1, LIS302DL_OUTX);
|
|
||||||
ybuf[0] = (int8_t)lis302dlReadRegister(&SPID1, LIS302DL_OUTY);
|
|
||||||
|
|
||||||
/* Transmitting accelerometer the data over SPI2.*/
|
|
||||||
spiSelect(&SPID2);
|
|
||||||
spiSend(&SPID2, 4, xbuf);
|
|
||||||
spiSend(&SPID2, 4, ybuf);
|
|
||||||
spiUnselect(&SPID2);
|
|
||||||
|
|
||||||
/* Calculating average of the latest four accelerometer readings.*/
|
/* Calculating average of the latest four accelerometer readings.*/
|
||||||
x = ((int32_t)xbuf[0] + (int32_t)xbuf[1] +
|
x = ((int32_t)xbuf[0] + (int32_t)xbuf[1] +
|
||||||
|
@ -195,20 +110,12 @@ static THD_FUNCTION(Thread1, arg) {
|
||||||
|
|
||||||
/* Reprogramming the four PWM channels using the accelerometer data.*/
|
/* Reprogramming the four PWM channels using the accelerometer data.*/
|
||||||
if (y < 0) {
|
if (y < 0) {
|
||||||
pwmEnableChannel(&PWMD4, 0, (pwmcnt_t)-y);
|
|
||||||
pwmEnableChannel(&PWMD4, 2, (pwmcnt_t)0);
|
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
pwmEnableChannel(&PWMD4, 2, (pwmcnt_t)y);
|
|
||||||
pwmEnableChannel(&PWMD4, 0, (pwmcnt_t)0);
|
|
||||||
}
|
}
|
||||||
if (x < 0) {
|
if (x < 0) {
|
||||||
pwmEnableChannel(&PWMD4, 1, (pwmcnt_t)-x);
|
|
||||||
pwmEnableChannel(&PWMD4, 3, (pwmcnt_t)0);
|
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
pwmEnableChannel(&PWMD4, 3, (pwmcnt_t)x);
|
|
||||||
pwmEnableChannel(&PWMD4, 1, (pwmcnt_t)0);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Waiting until the next 250 milliseconds time interval.*/
|
/* Waiting until the next 250 milliseconds time interval.*/
|
||||||
|
@ -296,7 +203,6 @@ int main(void) {
|
||||||
* Initializes the SPI driver 1 in order to access the MEMS. The signals
|
* Initializes the SPI driver 1 in order to access the MEMS. The signals
|
||||||
* are already initialized in the board file.
|
* are already initialized in the board file.
|
||||||
*/
|
*/
|
||||||
spiStart(&SPID1, &spi1cfg);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initializes the SPI driver 2. The SPI2 signals are routed as follow:
|
* Initializes the SPI driver 2. The SPI2 signals are routed as follow:
|
||||||
|
@ -305,7 +211,6 @@ int main(void) {
|
||||||
* PB14 - MISO.
|
* PB14 - MISO.
|
||||||
* PB15 - MOSI.
|
* PB15 - MOSI.
|
||||||
*/
|
*/
|
||||||
spiStart(&SPID2, &spi2cfg);
|
|
||||||
palSetPad(GPIOB, 12);
|
palSetPad(GPIOB, 12);
|
||||||
palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
|
palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
PAL_STM32_OSPEED_HIGHEST); /* NSS. */
|
PAL_STM32_OSPEED_HIGHEST); /* NSS. */
|
||||||
|
@ -318,7 +223,6 @@ int main(void) {
|
||||||
/*
|
/*
|
||||||
* Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs.
|
* Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs.
|
||||||
*/
|
*/
|
||||||
pwmStart(&PWMD4, &pwmcfg);
|
|
||||||
palSetPadMode(GPIOD, GPIOD_LED4, PAL_MODE_ALTERNATE(2)); /* Green. */
|
palSetPadMode(GPIOD, GPIOD_LED4, PAL_MODE_ALTERNATE(2)); /* Green. */
|
||||||
palSetPadMode(GPIOD, GPIOD_LED3, PAL_MODE_ALTERNATE(2)); /* Orange. */
|
palSetPadMode(GPIOD, GPIOD_LED3, PAL_MODE_ALTERNATE(2)); /* Orange. */
|
||||||
palSetPadMode(GPIOD, GPIOD_LED5, PAL_MODE_ALTERNATE(2)); /* Red. */
|
palSetPadMode(GPIOD, GPIOD_LED5, PAL_MODE_ALTERNATE(2)); /* Red. */
|
||||||
|
|
103
mcuconf.h
103
mcuconf.h
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||||
|
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
you may not use this file except in compliance with the License.
|
you may not use this file except in compliance with the License.
|
||||||
|
@ -14,8 +14,8 @@
|
||||||
limitations under the License.
|
limitations under the License.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _MCUCONF_H_
|
#ifndef MCUCONF_H
|
||||||
#define _MCUCONF_H_
|
#define MCUCONF_H
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* STM32F4xx drivers configuration.
|
* STM32F4xx drivers configuration.
|
||||||
|
@ -32,11 +32,18 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define STM32F4xx_MCUCONF
|
#define STM32F4xx_MCUCONF
|
||||||
|
#define STM32F405_MCUCONF
|
||||||
|
#define STM32F415_MCUCONF
|
||||||
|
#define STM32F407_MCUCONF
|
||||||
|
#define STM32F417_MCUCONF
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* HAL driver system settings.
|
* HAL driver system settings.
|
||||||
*/
|
*/
|
||||||
#define STM32_NO_INIT FALSE
|
#define STM32_NO_INIT FALSE
|
||||||
|
#define STM32_PVD_ENABLE FALSE
|
||||||
|
#define STM32_PLS STM32_PLS_LEV0
|
||||||
|
#define STM32_BKPRAM_ENABLE FALSE
|
||||||
#define STM32_HSI_ENABLED TRUE
|
#define STM32_HSI_ENABLED TRUE
|
||||||
#define STM32_LSI_ENABLED TRUE
|
#define STM32_LSI_ENABLED TRUE
|
||||||
#define STM32_HSE_ENABLED TRUE
|
#define STM32_HSE_ENABLED TRUE
|
||||||
|
@ -60,9 +67,24 @@
|
||||||
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
||||||
#define STM32_PLLI2SN_VALUE 192
|
#define STM32_PLLI2SN_VALUE 192
|
||||||
#define STM32_PLLI2SR_VALUE 5
|
#define STM32_PLLI2SR_VALUE 5
|
||||||
#define STM32_PVD_ENABLE FALSE
|
|
||||||
#define STM32_PLS STM32_PLS_LEV0
|
/*
|
||||||
#define STM32_BKPRAM_ENABLE FALSE
|
* IRQ system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_IRQ_EXTI0_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI1_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI2_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI3_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI4_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI5_9_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI10_15_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI16_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI17_PRIORITY 15
|
||||||
|
#define STM32_IRQ_EXTI18_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI19_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI20_PRIORITY 6
|
||||||
|
#define STM32_IRQ_EXTI21_PRIORITY 15
|
||||||
|
#define STM32_IRQ_EXTI22_PRIORITY 15
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ADC driver system settings.
|
* ADC driver system settings.
|
||||||
|
@ -91,22 +113,17 @@
|
||||||
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
|
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* EXT driver system settings.
|
* DAC driver system settings.
|
||||||
*/
|
*/
|
||||||
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
|
#define STM32_DAC_DUAL_MODE FALSE
|
||||||
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
|
#define STM32_DAC_USE_DAC1_CH1 FALSE
|
||||||
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
|
#define STM32_DAC_USE_DAC1_CH2 FALSE
|
||||||
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
|
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||||
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
|
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||||
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
|
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||||
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
|
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
|
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
|
#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||||
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
|
|
||||||
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
|
|
||||||
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
|
|
||||||
#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
|
|
||||||
#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* GPT driver system settings.
|
* GPT driver system settings.
|
||||||
|
@ -157,6 +174,21 @@
|
||||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* I2S driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_I2S_USE_SPI2 FALSE
|
||||||
|
#define STM32_I2S_USE_SPI3 FALSE
|
||||||
|
#define STM32_I2S_SPI2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2S_SPI3_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2S_SPI2_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2S_SPI3_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||||
|
#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||||
|
#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||||
|
#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||||
|
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ICU driver system settings.
|
* ICU driver system settings.
|
||||||
*/
|
*/
|
||||||
|
@ -193,7 +225,7 @@
|
||||||
#define STM32_PWM_USE_TIM1 FALSE
|
#define STM32_PWM_USE_TIM1 FALSE
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 TRUE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
#define STM32_PWM_USE_TIM5 FALSE
|
#define STM32_PWM_USE_TIM5 FALSE
|
||||||
#define STM32_PWM_USE_TIM8 FALSE
|
#define STM32_PWM_USE_TIM8 FALSE
|
||||||
#define STM32_PWM_USE_TIM9 FALSE
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
|
@ -205,13 +237,21 @@
|
||||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* RTC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_RTC_PRESA_VALUE 32
|
||||||
|
#define STM32_RTC_PRESS_VALUE 1024
|
||||||
|
#define STM32_RTC_CR_INIT 0
|
||||||
|
#define STM32_RTC_TAMPCR_INIT 0
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SDC driver system settings.
|
* SDC driver system settings.
|
||||||
*/
|
*/
|
||||||
#define STM32_SDC_SDIO_DMA_PRIORITY 3
|
#define STM32_SDC_SDIO_DMA_PRIORITY 3
|
||||||
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
|
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
|
||||||
#define STM32_SDC_WRITE_TIMEOUT_MS 250
|
#define STM32_SDC_WRITE_TIMEOUT_MS 1000
|
||||||
#define STM32_SDC_READ_TIMEOUT_MS 25
|
#define STM32_SDC_READ_TIMEOUT_MS 1000
|
||||||
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
|
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
|
||||||
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
|
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
|
||||||
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||||
|
@ -235,8 +275,8 @@
|
||||||
/*
|
/*
|
||||||
* SPI driver system settings.
|
* SPI driver system settings.
|
||||||
*/
|
*/
|
||||||
#define STM32_SPI_USE_SPI1 TRUE
|
#define STM32_SPI_USE_SPI1 FALSE
|
||||||
#define STM32_SPI_USE_SPI2 TRUE
|
#define STM32_SPI_USE_SPI2 FALSE
|
||||||
#define STM32_SPI_USE_SPI3 FALSE
|
#define STM32_SPI_USE_SPI3 FALSE
|
||||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||||
|
@ -302,8 +342,11 @@
|
||||||
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
||||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||||
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||||
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
|
||||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
|
||||||
|
|
||||||
#endif /* _MCUCONF_H_ */
|
/*
|
||||||
|
* WDG driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_WDG_USE_IWDG FALSE
|
||||||
|
|
||||||
|
#endif /* MCUCONF_H */
|
||||||
|
|
Loading…
Reference in New Issue