plain SPI external calibrations config #2
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6
board.mk
6
board.mk
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@ -19,5 +19,7 @@ DDEFS += -DRAM_UNUSED_SIZE=100
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# USE_OPT += -Wl,--defsym=FLASH_SIZE=768k
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#Serial flash support
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#include $(PROJECT_DIR)/hw_layer/drivers/flash/sst26f_jedec.mk
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# This board uses ChibiOS MFS driver on external SPI flash
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include $(PROJECT_DIR)/hw_layer/ports/stm32/use_higher_level_flash_api.mk
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#Serial flash driver
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include $(PROJECT_DIR)/hw_layer/drivers/flash/sst26f_jedec.mk
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@ -1,5 +1,45 @@
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#include "pch.h"
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void boardInitMfs() {
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/* This board stores settings in external plain SPI flash */
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#if !defined(EFI_BOOTLOADER) && (EFI_STORAGE_MFS == TRUE)
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}
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#include "hal_serial_nor.h"
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#include "hal_mfs.h"
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/* Some fields in following struct are used for DMA transfers, so do not cache */
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NO_CACHE SNORDriver snor1;
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const SPIConfig SPIcfg1 = {
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.end_cb = NULL,
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.error_cb = NULL,
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.dcr = STM32_DCR_FSIZE(23U) | /* 8MB device. */
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STM32_DCR_CSHT(1U) /* NCS 2 cycles delay. */
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};
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const SNORConfig snorcfg1 = {
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.busp = &SPID1,
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.buscfg = &SPIcfg1
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};
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const MFSConfig mfsd_nor_config = {
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.flashp = (BaseFlash *)&snor1,
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.erased = 0xFFFFFFFFU,
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.bank_size = 64 * 1024U,
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.bank0_start = 0U,
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.bank0_sectors = 128U, /* 128 * 4 K = 0.5 Mb */
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.bank1_start = 128U,
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.bank1_sectors = 128U
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};
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void boardInitMfs() {
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/* Initializing and starting snor1 driver.*/
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snorObjectInit(&snor1);
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snorStart(&snor1, &snorcfg1);
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}
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const MFSConfig *boardGetMfsConfig()
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{
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return &mfsd_nor_config;
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}
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#endif /* EFI_STORAGE_MFS == TRUE */
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