2013-07-31 08:48:23 -07:00
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/************************************************************************************//**
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2018-07-17 06:06:06 -07:00
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* \file Demo/ARMCM3_STM32F1_Olimex_STM32P103_GCC/Boot/main.c
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2013-07-31 08:48:23 -07:00
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* \brief Bootloader application source file.
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2016-10-24 04:08:54 -07:00
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* \ingroup Boot_ARMCM3_STM32F1_Olimex_STM32P103_GCC
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2013-07-31 08:48:23 -07:00
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2012 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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2016-04-30 15:52:15 -07:00
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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2013-07-31 08:48:23 -07:00
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*
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* \endinternal
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2011-11-26 00:01:02 -08:00
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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2018-08-15 07:18:10 -07:00
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#include "stm32f1xx.h" /* STM32 registers and drivers */
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#include "stm32f1xx_ll_rcc.h" /* STM32 LL RCC header */
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#include "stm32f1xx_ll_bus.h" /* STM32 LL BUS header */
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#include "stm32f1xx_ll_system.h" /* STM32 LL SYSTEM header */
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#include "stm32f1xx_ll_utils.h" /* STM32 LL UTILS header */
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#include "stm32f1xx_ll_usart.h" /* STM32 LL USART header */
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#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
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2011-11-26 00:01:02 -08:00
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/****************************************************************************************
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* Function prototypes
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****************************************************************************************/
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static void Init(void);
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2018-08-15 07:18:10 -07:00
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static void SystemClock_Config(void);
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2011-11-26 00:01:02 -08:00
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2013-07-31 08:48:23 -07:00
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/************************************************************************************//**
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** \brief This is the entry point for the bootloader application and is called
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** by the reset interrupt vector after the C-startup routines executed.
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** \return Program return code.
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2011-11-26 00:01:02 -08:00
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**
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****************************************************************************************/
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int main(void)
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{
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/* initialize the microcontroller */
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Init();
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/* initialize the bootloader */
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BootInit();
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/* start the infinite program loop */
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while (1)
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{
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/* run the bootloader task */
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BootTask();
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}
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/* program should never get here */
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return 0;
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} /*** end of main ***/
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2013-07-31 08:48:23 -07:00
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/************************************************************************************//**
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** \brief Initializes the microcontroller.
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** \return none.
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2011-11-26 00:01:02 -08:00
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**
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****************************************************************************************/
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static void Init(void)
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{
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2018-08-15 07:18:10 -07:00
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/* HAL library initialization */
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HAL_Init();
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/* configure system clock */
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SystemClock_Config();
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} /*** end of Init ***/
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/************************************************************************************//**
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** \brief System Clock Configuration. This code was created by CubeMX and configures
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** the system clock to match the configuration in the bootloader's
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** configuration (blt_conf.h), specifically the macros:
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** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
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** Note that the Lower Layer drivers were selected in CubeMX for the RCC
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** subsystem.
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** \return none.
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**
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****************************************************************************************/
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static void SystemClock_Config(void)
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{
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/* Set flash latency. */
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
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/* Verify flash latency setting. */
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if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
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2011-11-26 00:01:02 -08:00
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{
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/* Error setting flash latency. */
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2011-11-26 00:01:02 -08:00
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ASSERT_RT(BLT_FALSE);
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}
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2018-08-15 07:18:10 -07:00
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/* Enable the HSE clock. */
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LL_RCC_HSE_Enable();
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/* Wait till HSE is ready */
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while(LL_RCC_HSE_IsReady() != 1)
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2011-11-26 00:01:02 -08:00
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{
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;
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2011-11-26 00:01:02 -08:00
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}
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2018-08-15 07:18:10 -07:00
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/* Configure and enable the PLL. */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
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LL_RCC_PLL_Enable();
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/* Wait till PLL is ready */
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while(LL_RCC_PLL_IsReady() != 1)
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2011-11-26 00:01:02 -08:00
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{
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2018-08-15 07:18:10 -07:00
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;
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2011-11-26 00:01:02 -08:00
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}
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2018-08-15 07:18:10 -07:00
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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/* Wait till System clock is ready */
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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{
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;
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}
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/* Update the system clock speed setting. */
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LL_SetSystemCoreClock(BOOT_CPU_SYSTEM_SPEED_KHZ * 1000u);
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} /*** end of SystemClock_Config ***/
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/************************************************************************************//**
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** \brief Initializes the Global MSP. This function is called from HAL_Init()
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** function to perform system level initialization (GPIOs, clock, DMA,
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** interrupt).
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** \return none.
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**
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****************************************************************************************/
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void HAL_MspInit(void)
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{
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LL_GPIO_InitTypeDef GPIO_InitStruct;
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#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_RS232_ENABLE == 0)
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LL_USART_InitTypeDef USART_InitStruct;
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#endif
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/* AFIO and PWR clock enable. */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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/* GPIO ports clock enable. */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC);
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2020-02-06 08:22:58 -08:00
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#if (BOOT_COM_RS232_ENABLE > 0) || (BOOT_FILE_LOGGING_ENABLE > 0)
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/* UART clock enable. */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
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#endif
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2011-11-26 00:01:02 -08:00
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* CAN clock enable. */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CAN1);
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#endif
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/* Configure GPIO pin for the LED. */
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GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_12);
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/* Configure GPIO pin for (optional) backdoor entry input. */
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GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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2020-02-06 08:22:58 -08:00
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#if (BOOT_COM_RS232_ENABLE > 0) || (BOOT_FILE_LOGGING_ENABLE > 0)
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/* UART TX and RX GPIO pin configuration. */
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GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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2020-02-06 08:22:58 -08:00
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#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_RS232_ENABLE == 0)
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2018-08-15 07:18:10 -07:00
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/* configure UART peripheral */
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2020-02-06 08:22:58 -08:00
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USART_InitStruct.BaudRate = BOOT_COM_RS232_BAUDRATE;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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/* initialize the UART peripheral */
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LL_USART_Init(USART2, &USART_InitStruct);
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LL_USART_ConfigAsyncMode(USART2);
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LL_USART_Enable(USART2);
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#endif
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2011-11-26 00:01:02 -08:00
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#endif
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2018-08-15 07:18:10 -07:00
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* CAN TX and RX GPIO pin configuration. */
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GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* Re-map CAN1 pins to PB8 and PB9. */
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LL_GPIO_AF_RemapPartial2_CAN1();
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2013-05-22 14:08:02 -07:00
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#endif
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2018-08-15 07:18:10 -07:00
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} /*** end of HAL_MspInit ***/
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/************************************************************************************//**
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** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
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** function to perform system level de-initialization (GPIOs, clock, DMA,
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** interrupt).
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** \return none.
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**
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****************************************************************************************/
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void HAL_MspDeInit(void)
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{
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2020-02-15 02:54:43 -08:00
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/* Reset the RCC clock configuration to the default reset state. */
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LL_RCC_DeInit();
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2018-08-15 07:18:10 -07:00
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/* Deinit used GPIOs. */
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LL_GPIO_DeInit(GPIOC);
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LL_GPIO_DeInit(GPIOB);
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LL_GPIO_DeInit(GPIOA);
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* CAN clock disable. */
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LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_CAN1);
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#endif
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2020-02-06 08:22:58 -08:00
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#if (BOOT_COM_RS232_ENABLE > 0) || (BOOT_FILE_LOGGING_ENABLE > 0)
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#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_RS232_ENABLE == 0)
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2018-08-15 07:18:10 -07:00
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/* Disable UART peripheral */
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LL_USART_Disable(USART2);
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#endif
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/* UART clock disable. */
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LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_USART2);
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#endif
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/* GPIO ports clock disable. */
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LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOC);
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LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOB);
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LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOA);
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/* AFIO and PWR clock disable. */
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LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
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LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_AFIO);
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} /*** end of HAL_MspDeInit ***/
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2011-11-26 00:01:02 -08:00
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2022-08-08 06:28:31 -07:00
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/************************************************************************************//**
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** \brief This function handles the SysTick interrupt. The HAL driver is initialized
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** before the bootloader disables the global interrupts and reconfigures the
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** SysTick. It is theoretically possible that the SysTick interrupt still
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** fires before the timer driver disables it. Therefore the handler is
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** implemented here. If not, then the default handler from the C startup
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** code is used, which hangs the system.
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** \return none.
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**
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****************************************************************************************/
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void SysTick_Handler(void)
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{
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/* Nothing to do here. */
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} /*** end of SysTick_Handler ***/
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2011-11-26 00:01:02 -08:00
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/*********************************** end of main.c *************************************/
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