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Refs #1421. Corrected GPIO clock disable in Nucleo-L552ZE/CubeIDE demo bootloader. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@943 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2022-03-03 16:03:44 +00:00
parent 4cbbe2707d
commit 49c80e9ef9
1 changed files with 4 additions and 4 deletions
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8
Target/Demo/ARMCM33_STM32L5_Nucleo_L552ZE_CubeIDE/Boot/Core/Src/stm32l5xx_hal_msp.c
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@ -232,10 +232,10 @@ void HAL_MspDeInit(void)
LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_LPUART1);
/* GPIO ports clock disable. */
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOG);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOG);
LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
/* SYSCFG and PWR clock disable. */
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);