rusefi-1/firmware/hw_layer/drivers/can/can_hw.cpp

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/**
* @file can_hw.cpp
* @brief CAN bus low level code
*
* todo: this file should be split into two - one for CAN transport level ONLY and
* another one with actual messages
*
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* @see can_verbose.cpp for higher level logic
* @see obd2.cpp for OBD-II messages via CAN
*
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* @date Dec 11, 2013
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#include "global.h"
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#if EFI_CAN_SUPPORT
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#include "can.h"
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#include "engine_configuration.h"
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#include "pin_repository.h"
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#include "can_hw.h"
#include "can_msg_tx.h"
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#include "string.h"
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#include "mpu_util.h"
#include "engine.h"
#include "thread_priority.h"
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static int canReadCounter = 0;
int canWriteOk = 0;
int canWriteNotOk = 0;
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static bool isCanEnabled = false;
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// Values below calculated with http://www.bittiming.can-wiki.info/
// Pick ST micro bxCAN
// Clock rate of 42mhz for f4, 54mhz for f7, 80mhz for h7
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#ifdef STM32F4XX
// These have an 85.7% sample point
#define CAN_BTR_100 (CAN_BTR_SJW(0) | CAN_BTR_BRP(29) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_250 (CAN_BTR_SJW(0) | CAN_BTR_BRP(11) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
#define CAN_BTR_500 (CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
#define CAN_BTR_1k0 (CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
#elif defined(STM32F7XX)
// These have an 88.9% sample point
#define CAN_BTR_100 (CAN_BTR_SJW(0) | CAN_BTR_BRP(30) | CAN_BTR_TS1(15) | CAN_BTR_TS2(2))
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#define CAN_BTR_250 (CAN_BTR_SJW(0) | CAN_BTR_BRP(11) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
#define CAN_BTR_500 (CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
#define CAN_BTR_1k0 (CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
#elif defined(STM32H7XX)
// These have an 87.5% sample point
// FDCAN driver has different bit timing registers (yes, different format)
// for the arbitration and data phases
#define CAN_NBTP_100 0x00310C01
#define CAN_DBTP_100 0x00310C13
#define CAN_NBTP_250 0x00130C01
#define CAN_DBTP_250 0x00130C13
#define CAN_NBTP_500 0x00090C01
#define CAN_DBTP_500 0x00090C13
#define CAN_NBTP_1k0 0x00040C01
#define CAN_DBTP_1k0 0x00040C13
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#else
#error Please define CAN BTR settings for your MCU!
#endif
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/*
* 500KBaud
* automatic wakeup
* automatic recover from abort mode
* See section 22.7.7 on the STM32 reference manual.
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*
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* 29 bit would be CAN_TI0R_EXID (?) but we do not mention it here
* CAN_TI0R_STID "Standard Identifier or Extended Identifier"? not mentioned as well
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*/
#if defined(STM32F4XX) || defined(STM32F7XX)
static const CANConfig canConfig100 = {
.mcr = CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
.btr = CAN_BTR_100
};
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static const CANConfig canConfig250 = {
.mcr = CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
.btr = CAN_BTR_250
};
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static const CANConfig canConfig500 = {
.mcr = CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
.btr = CAN_BTR_500
};
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static const CANConfig canConfig1000 = {
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CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
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CAN_BTR_1k0 };
#elif defined(STM32H7XX)
static const CANConfig canConfig100 = {
.NBTP = CAN_NBTP_100,
.DBTP = CAN_DBTP_100,
.CCCR = 0,
.TEST = 0,
.RXGFC = 0,
};
static const CANConfig canConfig250 = {
.NBTP = CAN_NBTP_250,
.DBTP = CAN_DBTP_250,
.CCCR = 0,
.TEST = 0,
.RXGFC = 0,
};
static const CANConfig canConfig500 = {
.NBTP = CAN_NBTP_500,
.DBTP = CAN_DBTP_500,
.CCCR = 0,
.TEST = 0,
.RXGFC = 0,
};
static const CANConfig canConfig1000 = {
.NBTP = CAN_NBTP_1k0,
.DBTP = CAN_DBTP_1k0,
.CCCR = 0,
.TEST = 0,
.RXGFC = 0,
};
#endif
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static const CANConfig *canConfig = &canConfig500;
class CanRead final : public ThreadController<UTILITY_THREAD_STACK_SIZE> {
public:
CanRead()
: ThreadController("CAN RX", PRIO_CAN_RX)
{
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}
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void ThreadTask() override {
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CANDriver* device = detectCanDevice(CONFIG(canRxPin), CONFIG(canTxPin));
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if (!device) {
warning(CUSTOM_ERR_CAN_CONFIGURATION, "CAN configuration issue");
return;
}
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while (true) {
// Block until we get a message
msg_t result = canReceiveTimeout(device, CAN_ANY_MAILBOX, &m_buffer, TIME_INFINITE);
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if (result != MSG_OK) {
continue;
}
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// Process the message
canReadCounter++;
processCanRxMessage(m_buffer, getTimeNowNt());
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}
}
private:
CANRxFrame m_buffer;
};
static CanRead canRead CCM_OPTIONAL;
static CanWrite canWrite CCM_OPTIONAL;
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static void canInfo(void) {
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if (!isCanEnabled) {
efiPrintf("CAN is not enabled, please enable & restart");
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return;
}
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efiPrintf("CAN TX %s", hwPortname(CONFIG(canTxPin)));
efiPrintf("CAN RX %s", hwPortname(CONFIG(canRxPin)));
efiPrintf("type=%d canReadEnabled=%s canWriteEnabled=%s period=%d", engineConfiguration->canNbcType,
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boolToString(engineConfiguration->canReadEnabled), boolToString(engineConfiguration->canWriteEnabled),
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engineConfiguration->canSleepPeriodMs);
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efiPrintf("CAN rx_cnt=%d/tx_ok=%d/tx_not_ok=%d", canReadCounter, canWriteOk, canWriteNotOk);
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}
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void setCanType(int type) {
engineConfiguration->canNbcType = (can_nbc_e)type;
canInfo();
}
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#if EFI_TUNER_STUDIO
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void postCanState(TunerStudioOutputChannels *tsOutputChannels) {
tsOutputChannels->debugIntField1 = isCanEnabled ? canReadCounter : -1;
tsOutputChannels->debugIntField2 = isCanEnabled ? canWriteOk : -1;
tsOutputChannels->debugIntField3 = isCanEnabled ? canWriteNotOk : -1;
}
#endif /* EFI_TUNER_STUDIO */
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void enableFrankensoCan(DECLARE_ENGINE_PARAMETER_SIGNATURE) {
CONFIG(canTxPin) = GPIOB_6;
CONFIG(canRxPin) = GPIOB_12;
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engineConfiguration->canReadEnabled = false;
}
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// todo: we usually use 'activeConfiguration' for 'stopPin' why this unusual code here?
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// this is related to #1375
static brain_pin_e currentTxPin = GPIO_UNASSIGNED;
static brain_pin_e currentRxPin = GPIO_UNASSIGNED;
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void stopCanPins(DECLARE_ENGINE_PARAMETER_SIGNATURE) {
efiSetPadUnused(currentTxPin);
efiSetPadUnused(currentRxPin);
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}
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void startCanPins(DECLARE_ENGINE_PARAMETER_SIGNATURE) {
// Store pins so we can disable later
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currentTxPin = CONFIG(canTxPin);
currentRxPin = CONFIG(canRxPin);
efiSetPadMode("CAN TX", currentTxPin, PAL_MODE_ALTERNATE(EFI_CAN_TX_AF));
efiSetPadMode("CAN RX", currentRxPin, PAL_MODE_ALTERNATE(EFI_CAN_RX_AF));
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}
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void initCan(void) {
addConsoleAction("caninfo", canInfo);
isCanEnabled =
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(isBrainPinValid(CONFIG(canTxPin))) && // both pins are set...
(isBrainPinValid(CONFIG(canRxPin))) &&
(CONFIG(canWriteEnabled) || CONFIG(canReadEnabled)) ; // ...and either read or write is enabled
// nothing to do if we aren't enabled...
if (!isCanEnabled) {
return;
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}
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// Validate pins
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if (!isValidCanTxPin(CONFIG(canTxPin))) {
firmwareError(CUSTOM_OBD_70, "invalid CAN TX %s", hwPortname(CONFIG(canTxPin)));
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return;
}
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if (!isValidCanRxPin(CONFIG(canRxPin))) {
firmwareError(CUSTOM_OBD_70, "invalid CAN RX %s", hwPortname(CONFIG(canRxPin)));
return;
}
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switch (CONFIG(canBaudRate)) {
case B100KBPS:
canConfig = &canConfig100;
break;
case B250KBPS:
canConfig = &canConfig250;
break;
case B500KBPS:
canConfig = &canConfig500;
break;
case B1MBPS:
canConfig = &canConfig1000;
break;
default:
break;
}
startCanPins();
// Initialize hardware
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#if STM32_CAN_USE_CAN2
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// CAN1 is required for CAN2
canStart(&CAND1, canConfig);
canStart(&CAND2, canConfig);
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#else
canStart(&CAND1, canConfig);
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#endif /* STM32_CAN_USE_CAN2 */
// Plumb CAN device to tx system
CanTxMessage::setDevice(detectCanDevice(
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CONFIG(canRxPin),
CONFIG(canTxPin)
));
// fire up threads, as necessary
if (CONFIG(canWriteEnabled)) {
canWrite.Start();
}
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if (CONFIG(canReadEnabled)) {
canRead.Start();
}
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}
#endif /* EFI_CAN_SUPPORT */