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fixing F4 compilation

This commit is contained in:
rusefi 2019-06-23 10:34:49 -04:00
parent 15d76462e5
commit 5b728cadb3
1 changed files with 1 additions and 1 deletions
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2
firmware/hw_layer/adc_inputs.cpp
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@ -343,7 +343,7 @@ int AdcDevice::getAdcValueByIndex(int internalIndex) const {
} }
void AdcDevice::invalidateSamplesCache() { void AdcDevice::invalidateSamplesCache() {
#if PROJECT_CPU == ARCH_STM32F7 #if defined(STM32F7XX)
// The STM32F7xx has a data cache // The STM32F7xx has a data cache
// DMA operations DO NOT invalidate cache lines, since the ARM m7 doesn't have // DMA operations DO NOT invalidate cache lines, since the ARM m7 doesn't have
// anything like a CCI that maintains coherency across multiple bus masters. // anything like a CCI that maintains coherency across multiple bus masters.