mirror of https://github.com/rusefi/wideband.git
0701 rev2 2 (#91)
* Rev 2: VM_RESISTOR_VALUE (cherry picked from commit 84ae91fc67cf6764afd5b00210edbc3cfe4444a5) * Rev 2: default settings for LSU4.9 (cherry picked from commit 5a1fe84bc1ec8d7ee6e0a5f2906a1b18d2ff8a8e) * Per-board VM_RESISTOR_VALUE (cherry picked from commit 0bdd19e058db579bed13488066df1176ea9addb2) * Rev2: ID correct pins (cherry picked from commit 59e4b36ad9bc7c166c3dae7e25b6317caf562056) * Rev2: LSU 4.2 and ADV ESR drive pins (cherry picked from commit 2f2b4399431136951fe2fa6819f44ba28c3cda17) * Rev2: aux pwm pins: no need to be 50MHz fast (cherry picked from commit b0af5c07c391438ca561118174df498207255f3b) Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
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@ -11,4 +11,9 @@
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// *******************************
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#define NERNST_INPUT_GAIN (1 / 2.7f)
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#define AFR_CHANNELS 1
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#define AFR_CHANNELS 1
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// *******************************
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// Nernst voltage & ESR sense
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// *******************************
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#define VM_RESISTOR_VALUE (10)
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@ -18,3 +18,8 @@
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#define BATTERY_INPUT_DIVIDER (10.0 / (10.0 + 39.0))
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#define AFR_CHANNELS 1
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// *******************************
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// Nernst voltage & ESR sense
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// *******************************
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#define VM_RESISTOR_VALUE (10)
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@ -99,20 +99,20 @@
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* Port B setup.
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* PB0 - Vbatt_sense (analog in).
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* PB1 - Heater_sense (analog in).
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* PB2 - Nernsr_4.9_bias (digital input, no pull) - keep high-Z after power on
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* PB2 - Nernsr_4.9_bias (digital output, 2 Mhz)
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* PB3 - SWO (digital input)
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* PB4..PB5 - DISP1..DISP2 - unused
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* PB6 - heater_pwm (output pushpull, alternate, 2 MHz).
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* PB7..PB9 - DISP4..DISP6 - unused
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* PB10 - Nernsr_ADV_esr_drive (digital input, no pull) - keep high-Z after power on
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* PB11 - Nernsr_4.9_esr_drive (digital input, no pull) - keep high-Z after power on
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* PB11 - Nernsr_4.9_esr_drive (output pushpull, 50 Mhz)
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* PB12 - Nernsr_4.2_esr_drive (digital input, no pull) - keep high-Z after power on
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* PB13 - Blue LED (output pushpull, 2 MHz)
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* PB14 - PWMout2 (output pushpull, alternate, 50 Mhz).
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* PB15 - PWMout1 (output pushpull, alternate, 50 Mhz).
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* PB14 - PWMout2 (output pushpull, alternate, 2 Mhz).
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* PB15 - PWMout1 (output pushpull, alternate, 2 Mhz).
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*/
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#define VAL_GPIOBCRL 0x8A888400 /* PB7...PB0 */
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#define VAL_GPIOBCRH 0xBB244488 /* PB15...PB8 */
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#define VAL_GPIOBCRL 0x8A888200 /* PB7...PB0 */
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#define VAL_GPIOBCRH 0xAA243488 /* PB15...PB8 */
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#define VAL_GPIOBODR 0x0000FFFF
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/*
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@ -6,11 +6,18 @@
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#define LED_GREEN_PORT GPIOA
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#define LED_GREEN_PIN 8
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#define NERNST_ESR_DRIVER_PORT GPIOB
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#define NERNST_ESR_DRIVER_PIN 12
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// LSU 4.2 - 6.8K
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#define NERNST_42_ESR_DRIVER_PORT GPIOB
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#define NERNST_42_ESR_DRIVER_PIN 12
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// LSU 4.9 - 22K
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#define NERNST_ESR_DRIVER_PORT GPIOB
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#define NERNST_ESR_DRIVER_PIN 11
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// LSU ADV - 47K
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#define NERNST_ADV_ESR_DRIVER_PORT GPIOB
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#define NERNST_ADV_ESR_DRIVER_PIN 10
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// PC13 on rev 0.1
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// exploring jumper wire from PB6 DISP3 to HEATER
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// PB6 TIM4_CH1
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#define HEATER_PWM_DEVICE PWMD4
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#define HEATER_PWM_CHANNEL 0
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#define PUMP_DAC_PWM_DEVICE PWMD2
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#define PUMP_DAC_PWM_CHANNEL 1
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#define ID_SEL1_PORT GPIOB
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#define ID_SEL1_PIN 0
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#define ID_SEL1_PORT GPIOC
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#define ID_SEL1_PIN 13
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#define ID_SEL2_PORT GPIOB
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#define ID_SEL2_PIN 1
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#define ID_SEL2_PORT GPIOC
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#define ID_SEL2_PIN 14
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@ -30,3 +30,8 @@
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#define VM_INPUT_DIVIDER (10.0 / (10.0 + 100.0))
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#define AFR_CHANNELS 1
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// *******************************
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// Nernst voltage & ESR sense
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// *******************************
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#define VM_RESISTOR_VALUE (0)
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@ -9,7 +9,6 @@
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// Nernst AC injection resistor value
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#define ESR_SUPPLY_R (22000)
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#define VM_RESISTOR_VALUE (10)
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// Heater low pass filter
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#define ESR_SENSE_ALPHA (0.002f)
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