Artery AT32F4xx port: update
This commit is contained in:
Andrey Gusakov
rusefillc
parent
deadc35124
commit
066a657ad0
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/**
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******************************************************************************
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* @file stm32f4xx.h
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* @author MCD Application Team
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* @version V2.6.1
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* @date 14-February-2017
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* @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32F4xx device used in the target application
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* - To use or not the peripheral’s drivers in application code(i.e.
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* code will be based on direct access to peripheral’s registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32f4xx
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* @{
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*/
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#ifndef __AT32F4xx_H
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#define __AT32F4xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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* @{
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*/
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/**
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* @brief STM32 Family
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*/
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#if !defined (STM32F4)
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#define STM32F4
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#endif /* STM32F4 */
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/* Uncomment the line below according to the target STM32 device used in your
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application
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*/
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#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
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!defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
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!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \
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!defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \
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!defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \
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!defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx)
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/* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
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/* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
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/* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
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/* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
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/* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
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/* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
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/* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
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STM32F439NI, STM32F429IG and STM32F429II Devices */
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/* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
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STM32F439NI, STM32F439IG and STM32F439II Devices */
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/* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
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/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
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/* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */
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/* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
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/* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */
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/* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */
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/* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,
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and STM32F446ZE Devices */
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/* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG,
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STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */
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/* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG
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and STM32F479NG Devices */
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/* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */
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/* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */
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/* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */
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/* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */
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/* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG,
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STM32F413RG, STM32F413VG and STM32F413ZG Devices */
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/* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (USE_HAL_DRIVER)
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
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/*#define USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS version number V2.6.1
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*/
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#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
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#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
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#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
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#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\
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|(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\
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|(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\
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|(__STM32F4xx_CMSIS_VERSION))
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/**
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* @}
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*/
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(AT32F435xx) || defined(AT32F437xx)
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#include "at32f435xx.h"
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#else
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#error "Please select first the target AT32F4xx device used in your application (in at32f4xx.h file)"
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#endif
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/**
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* @}
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*/
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/** @addtogroup Exported_types
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* @{
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*/
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typedef enum
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{
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RESET = 0U,
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SET = !RESET
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} FlagStatus, ITStatus;
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typedef enum
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{
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DISABLE = 0U,
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ENABLE = !DISABLE
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} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum
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{
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ERROR = 0U,
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SUCCESS = !ERROR
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} ErrorStatus;
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/**
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* @}
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*/
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/** @addtogroup Exported_macro
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* @{
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*/
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#define SET_BIT(REG, BIT) ((REG) |= (BIT))
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#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
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#define READ_BIT(REG, BIT) ((REG) & (BIT))
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#define CLEAR_REG(REG) ((REG) = (0x0))
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#define WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define READ_REG(REG) ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
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/**
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* @}
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*/
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#if defined (USE_HAL_DRIVER)
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#include "stm32f4xx_hal.h"
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#endif /* USE_HAL_DRIVER */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __AT32F4xx_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@ -0,0 +1,124 @@
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/**
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******************************************************************************
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* @file system_stm32f4xx.h
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* @author MCD Application Team
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* @version V2.6.1
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* @date 14-February-2017
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* @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
|
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* this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32f4xx_system
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* @{
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*/
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/**
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* @brief Define to prevent recursive inclusion
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*/
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#ifndef __SYSTEM_STM32F4XX_H
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#define __SYSTEM_STM32F4XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup STM32F4xx_System_Includes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F4xx_System_Exported_types
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* @{
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*/
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/* This variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetSysClockFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
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extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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/**
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* @}
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*/
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/** @addtogroup STM32F4xx_System_Exported_Constants
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F4xx_System_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F4xx_System_Exported_Functions
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* @{
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*/
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extern void SystemInit(void);
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extern void SystemCoreClockUpdate(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SYSTEM_STM32F4XX_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@ -0,0 +1,18 @@
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# List of the ChibiOS generic AT32F4xx startup and CMSIS files.
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STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c
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STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \
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$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S
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STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \
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$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \
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$(CHIBIOS)/os/common/startup/ARMCMx/devices/AT32F4xx \
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$(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \
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$(CHIBIOS)/os/common/ext/Artery/AT32F4xx
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STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld
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# Shared variables
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ALLXASMSRC += $(STARTUPASM)
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ALLCSRC += $(STARTUPSRC)
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ALLINC += $(STARTUPINC)
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|
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@ -0,0 +1,88 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
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|
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/**
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* @file STM32F4xx/cmparams.h
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* @brief ARM Cortex-M4 parameters for the STM32F4xx.
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*
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* @defgroup ARMCMx_STM32F4xx STM32F4xx Specific Parameters
|
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M4 specific parameters for the
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* STM32F4xx platform.
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* @{
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*/
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#ifndef CMPARAMS_H
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#define CMPARAMS_H
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/**
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* @brief Cortex core model.
|
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*/
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#define CORTEX_MODEL 4
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/**
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* @brief Floating Point unit presence.
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*/
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#define CORTEX_HAS_FPU 1
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/**
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* @brief Number of bits in priority masks.
|
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*/
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#define CORTEX_PRIORITY_BITS 4
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/* If the device type is not externally defined, for example from the Makefile,
|
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then a file named board.h is included. This file must contain a device
|
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definition compatible with the vendor include file.*/
|
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#if !defined(AT32F435xx) && !defined(AT32F437xx)
|
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#include "board.h"
|
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#endif
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|
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/**
|
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* @brief Number of interrupt vectors.
|
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* @note This number does not include the 16 system vectors and must be
|
||||
* rounded to a multiple of 8.
|
||||
*/
|
||||
#define CORTEX_NUM_VECTORS 104
|
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|
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/* The following code is not processed when the file is included from an
|
||||
asm module.*/
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/* Including the device CMSIS header. Note, we are not using the definitions
|
||||
from this header because we need this file to be usable also from
|
||||
assembler source files. We verify that the info matches instead.*/
|
||||
#include "at32f4xx.h"
|
||||
|
||||
/*lint -save -e9029 [10.4] Signedness comes from external files, it is
|
||||
unpredictable but gives no problems.*/
|
||||
#if CORTEX_MODEL != __CORTEX_M
|
||||
#error "CMSIS __CORTEX_M mismatch"
|
||||
#endif
|
||||
|
||||
#if CORTEX_HAS_FPU != __FPU_PRESENT
|
||||
#error "CMSIS __FPU_PRESENT mismatch"
|
||||
#endif
|
||||
|
||||
#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
|
||||
#error "CMSIS __NVIC_PRIO_BITS mismatch"
|
||||
#endif
|
||||
/*lint -restore*/
|
||||
|
||||
#endif /* !defined(_FROM_ASM_) */
|
||||
|
||||
#endif /* CMPARAMS_H */
|
||||
|
||||
/** @} */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -27,11 +27,7 @@
|
|||
|
||||
#include "at32_registry.h"
|
||||
|
||||
#if defined(STM32F413xx)
|
||||
#include "hal_lld_type2.h"
|
||||
#else
|
||||
#include "hal_lld_type1.h"
|
||||
#endif
|
||||
|
||||
/* Various helpers.*/
|
||||
#include "nvic.h"
|
||||
|
|
|
|||
|
|
@ -56,65 +56,11 @@
|
|||
* @name Platform identification macros
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F205xx) || defined(__DOXYGEN__)
|
||||
#define PLATFORM_NAME "STM32F205 High Performance"
|
||||
|
||||
#elif defined(STM32F207xx)
|
||||
#define PLATFORM_NAME "STM32F207 High Performance"
|
||||
|
||||
#elif defined(STM32F215xx)
|
||||
#define PLATFORM_NAME "STM32F215 High Performance"
|
||||
|
||||
#elif defined(STM32F217xx)
|
||||
#define PLATFORM_NAME "STM32F217 High Performance"
|
||||
|
||||
#elif defined(STM32F401xx)
|
||||
#define PLATFORM_NAME "STM32F401 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F405xx)
|
||||
#define PLATFORM_NAME "STM32F405 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F407xx)
|
||||
#define PLATFORM_NAME "STM32F407 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F410xx)
|
||||
#define PLATFORM_NAME "STM32F410 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F411xx)
|
||||
#define PLATFORM_NAME "STM32F411 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F412xx)
|
||||
#define PLATFORM_NAME "STM32F412 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F415xx)
|
||||
#define PLATFORM_NAME "STM32F415 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F417xx)
|
||||
#define PLATFORM_NAME "STM32F417 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F427xx)
|
||||
#define PLATFORM_NAME "STM32F427 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F429xx)
|
||||
#define PLATFORM_NAME "STM32F429 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F437xx)
|
||||
#define PLATFORM_NAME "STM32F437 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F439xx)
|
||||
#define PLATFORM_NAME "STM32F439 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F446xx)
|
||||
#define PLATFORM_NAME "STM32F446 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F469xx)
|
||||
#define PLATFORM_NAME "STM32F469 High Performance with DSP and FPU"
|
||||
|
||||
#elif defined(STM32F479xx)
|
||||
#define PLATFORM_NAME "STM32F479 High Performance with DSP and FPU"
|
||||
#if defined(AT32F435xx) || defined(AT32F437xx)
|
||||
#define PLATFORM_NAME "AT32F435/437 High Performance with DSP, FPU and MPU"
|
||||
|
||||
#else
|
||||
#error "STM32F2xx/F4xx device not specified"
|
||||
#error "AT32FF4xx device not specified"
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
|
|
@ -122,9 +68,7 @@
|
|||
* @name Absolute Maximum Ratings
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F427xx) || defined(STM32F437xx) || \
|
||||
defined(STM32F429xx) || defined(STM32F439xx) || \
|
||||
defined(STM32F469xx) || defined(STM32F479xx) || defined(__DOXYGEN__)
|
||||
#if defined(AT32F435xx) || defined(AT32F437xx) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Absolute maximum system clock.
|
||||
*/
|
||||
|
|
@ -220,109 +164,6 @@
|
|||
*/
|
||||
#define STM32_SPII2S_MAX 45000000
|
||||
#endif
|
||||
|
||||
#if defined(STM32F40_41xxx)
|
||||
#define STM32_SYSCLK_MAX 168000000
|
||||
#define STM32_HSECLK_MAX 26000000
|
||||
#define STM32_HSECLK_BYP_MAX 50000000
|
||||
#define STM32_HSECLK_MIN 4000000
|
||||
#define STM32_HSECLK_BYP_MIN 1000000
|
||||
#define STM32_LSECLK_MAX 32768
|
||||
#define STM32_LSECLK_BYP_MAX 1000000
|
||||
#define STM32_LSECLK_MIN 32768
|
||||
#define STM32_PLLIN_MAX 2100000
|
||||
#define STM32_PLLIN_MIN 950000
|
||||
#define STM32_PLLVCO_MAX 432000000
|
||||
#define STM32_PLLVCO_MIN 192000000
|
||||
#define STM32_PLLOUT_MAX 168000000
|
||||
#define STM32_PLLOUT_MIN 24000000
|
||||
#define STM32_PCLK1_MAX 42000000
|
||||
#define STM32_PCLK2_MAX 84000000
|
||||
#define STM32_SPII2S_MAX 42000000
|
||||
#endif
|
||||
|
||||
#if defined(STM32F401xx)
|
||||
#define STM32_SYSCLK_MAX 84000000
|
||||
#define STM32_HSECLK_MAX 26000000
|
||||
#define STM32_HSECLK_BYP_MAX 50000000
|
||||
#define STM32_HSECLK_MIN 4000000
|
||||
#define STM32_HSECLK_BYP_MIN 1000000
|
||||
#define STM32_LSECLK_MAX 32768
|
||||
#define STM32_LSECLK_BYP_MAX 1000000
|
||||
#define STM32_LSECLK_MIN 32768
|
||||
#define STM32_PLLIN_MAX 2100000
|
||||
#define STM32_PLLIN_MIN 950000
|
||||
#define STM32_PLLVCO_MAX 432000000
|
||||
#define STM32_PLLVCO_MIN 192000000
|
||||
#define STM32_PLLOUT_MAX 84000000
|
||||
#define STM32_PLLOUT_MIN 24000000
|
||||
#define STM32_PCLK1_MAX 42000000
|
||||
#define STM32_PCLK2_MAX 84000000
|
||||
#define STM32_SPII2S_MAX 42000000
|
||||
#endif
|
||||
|
||||
#if defined(STM32F410xx) || defined(STM32F411xx) || \
|
||||
defined(STM32F412xx)
|
||||
#define STM32_SYSCLK_MAX 100000000
|
||||
#define STM32_HSECLK_MAX 26000000
|
||||
#define STM32_HSECLK_BYP_MAX 50000000
|
||||
#define STM32_HSECLK_MIN 4000000
|
||||
#define STM32_HSECLK_BYP_MIN 1000000
|
||||
#define STM32_LSECLK_MAX 32768
|
||||
#define STM32_LSECLK_BYP_MAX 1000000
|
||||
#define STM32_LSECLK_MIN 32768
|
||||
#define STM32_PLLIN_MAX 2100000
|
||||
#define STM32_PLLIN_MIN 950000
|
||||
#define STM32_PLLVCO_MAX 432000000
|
||||
#define STM32_PLLVCO_MIN 100000000
|
||||
#define STM32_PLLOUT_MAX 100000000
|
||||
#define STM32_PLLOUT_MIN 24000000
|
||||
#define STM32_PCLK1_MAX 50000000
|
||||
#define STM32_PCLK2_MAX 100000000
|
||||
#define STM32_SPII2S_MAX 50000000
|
||||
#endif
|
||||
|
||||
#if defined(STM32F446xx)
|
||||
#define STM32_SYSCLK_MAX 180000000
|
||||
#define STM32_HSECLK_MAX 26000000
|
||||
#define STM32_HSECLK_BYP_MAX 50000000
|
||||
#define STM32_HSECLK_MIN 4000000
|
||||
#define STM32_HSECLK_BYP_MIN 1000000
|
||||
#define STM32_LSECLK_MAX 32768
|
||||
#define STM32_LSECLK_BYP_MAX 1000000
|
||||
#define STM32_LSECLK_MIN 32768
|
||||
#define STM32_PLLIN_MAX 2100000
|
||||
#define STM32_PLLIN_MIN 950000
|
||||
#define STM32_PLLVCO_MAX 432000000
|
||||
#define STM32_PLLVCO_MIN 100000000
|
||||
#define STM32_PLLOUT_MAX 180000000
|
||||
#define STM32_PLLOUT_MIN 12500000
|
||||
#define STM32_PLLI2SOUT_MAX 216000000
|
||||
#define STM32_PLLSAIOUT_MAX 216000000
|
||||
#define STM32_PCLK1_MAX (STM32_PLLOUT_MAX / 4)
|
||||
#define STM32_PCLK2_MAX (STM32_PLLOUT_MAX / 2)
|
||||
#define STM32_SPII2S_MAX 45000000
|
||||
#endif
|
||||
|
||||
#if defined(STM32F2XX)
|
||||
#define STM32_SYSCLK_MAX 120000000
|
||||
#define STM32_HSECLK_MAX 26000000
|
||||
#define STM32_HSECLK_BYP_MAX 26000000
|
||||
#define STM32_HSECLK_MIN 1000000
|
||||
#define STM32_HSECLK_BYP_MIN 1000000
|
||||
#define STM32_LSECLK_MAX 32768
|
||||
#define STM32_LSECLK_BYP_MAX 1000000
|
||||
#define STM32_LSECLK_MIN 32768
|
||||
#define STM32_PLLIN_MAX 2000000
|
||||
#define STM32_PLLIN_MIN 950000
|
||||
#define STM32_PLLVCO_MAX 432000000
|
||||
#define STM32_PLLVCO_MIN 192000000
|
||||
#define STM32_PLLOUT_MAX 120000000
|
||||
#define STM32_PLLOUT_MIN 24000000
|
||||
#define STM32_PCLK1_MAX 30000000
|
||||
#define STM32_PCLK2_MAX 60000000
|
||||
#define STM32_SPII2S_MAX 30000000
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue