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Improved checks on PPL1. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15864 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-12-08 14:38:40 +00:00
parent f67c8298d5
commit 07382282ba
2 changed files with 4 additions and 4 deletions
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6
os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
View File

@ -1660,9 +1660,9 @@
/** /**
* @brief PLL1 DIVP field. * @brief PLL1 DIVP field.
*/ */
#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) && \ #if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \
(STM32_PLL1_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__)
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U) #define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
#else #else
#error "invalid STM32_PLL1_DIVP_VALUE value specified" #error "invalid STM32_PLL1_DIVP_VALUE value specified"
#endif #endif

2
os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h
View File

@ -1726,7 +1726,7 @@
* @brief PLL1 DIVP field. * @brief PLL1 DIVP field.
*/ */
#if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ #if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \
((STM32_PLL1_DIVP_VALUE & 0x1) == 0x0)) || defined(__DOXYGEN__) ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__)
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos) #define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
#else #else
#error "invalid STM32_PLL1_DIVP_VALUE value specified" #error "invalid STM32_PLL1_DIVP_VALUE value specified"