git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13014 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2019-09-22 09:27:26 +00:00
parent 903a038fb5
commit cc1aadc935
11 changed files with 1370 additions and 21 deletions

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim1_tim15_tim16_tim17.inc
* @brief Shared TIM1, TIM15, TIM16, TIM17 handler.
*
* @addtogroup STM32_TIM1_TIM15_TIM16_TIM17_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM1_IS_USED) || defined(STM32_TIM15_IS_USED) || \
defined(STM32_TIM16_IS_USED) || defined(STM32_TIM17_IS_USED) || \
defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM1_TIM15_TIM16_TIM17_INIT() do { \
nvicEnableVector(STM32_TIM1_BRK_TIM15_NUMBER, \
STM32_IRQ_TIM1_BRK_TIM15_PRIORITY); \
nvicEnableVector(STM32_TIM1_UP_TIM16_NUMBER, \
STM32_IRQ_TIM1_UP_TIM16_PRIORITY); \
nvicEnableVector(STM32_TIM1_TRGCO_TIM17_NUMBER, \
STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY); \
nvicEnableVector(STM32_TIM1_CC_NUMBER, \
STM32_IRQ_TIM1_CC_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM1_TIM15_TIM16_TIM17_DEINIT() do { \
nvicDisableVector(STM32_TIM1_BRK_TIM15_NUMBER); \
nvicDisableVector(STM32_TIM1_UP_TIM16_NUMBER); \
nvicDisableVector(STM32_TIM1_TRGCO_TIM17_NUMBER); \
nvicDisableVector(STM32_TIM1_CC_NUMBER); \
} while (0)
#else
#define STM32_TIM1_TIM15_TIM16_TIM17_INIT()
#define STM32_TIM1_TIM15_TIM16_TIM17_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM1_BRK_TIM15_PRIORITY)
#error "STM32_IRQ_TIM1_BRK_TIM15_PRIORITY not defined in mcuconf.h"
#endif
#if !defined(STM32_IRQ_TIM1_UP_TIM16_PRIORITY)
#error "STM32_IRQ_TIM1_UP_TIM16_PRIORITY not defined in mcuconf.h"
#endif
#if !defined(STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY)
#error "STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY not defined in mcuconf.h"
#endif
#if !defined(STM32_IRQ_TIM1_CC_PRIORITY)
#error "STM32_IRQ_TIM1_CC_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM1_BRK_TIM15_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM1_BRK_TIM15_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM1_UP_TIM16_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM1_UP_TIM16_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM1_CC_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM1_CC_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM1-BRK, TIM15 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM1_BRK_TIM15_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM15
gpt_lld_serve_interrupt(&GPTD15);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM15
icu_lld_serve_interrupt(&ICUD15);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM15
pwm_lld_serve_interrupt(&PWMD15);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
/**
* @brief TIM1-UP, TIM16 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM1_UP_TIM16_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM1
gpt_lld_serve_interrupt(&GPTD1);
#endif
#if STM32_GPT_USE_TIM16
gpt_lld_serve_interrupt(&GPTD16);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM1
icu_lld_serve_interrupt(&ICUD1);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM1
pwm_lld_serve_interrupt(&PWMD1);
#endif
#if STM32_PWM_USE_TIM16
pwm_lld_serve_interrupt(&PWMD16);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
/**
* @brief TIM1-TRG-COM, TIM17 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM1_TRGCO_TIM17_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM17
gpt_lld_serve_interrupt(&GPTD17);
#endif
#endif
#if HAL_USE_ICU
/* Not used by ICU.*/
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM17
pwm_lld_serve_interrupt(&PWMD17);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
/**
* @brief TIM1-CC interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
/* Not used by GPT.*/
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM1
icu_lld_serve_interrupt(&ICUD1);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM1
pwm_lld_serve_interrupt(&PWMD1);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim2.inc
* @brief Shared TIM2 handler.
*
* @addtogroup STM32_TIM2_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM2_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM2_TIM2_INIT() do { \
nvicEnableVector(STM32_TIM2_NUMBER, \
STM32_IRQ_TIM2_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM2_TIM2_DEINIT() do { \
nvicDisableVector(STM32_TIM2_NUMBER); \
} while (0)
#else
#define STM32_TIM2_TIM2_INIT()
#define STM32_TIM2_TIM2_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM2_PRIORITY)
#error "STM32_IRQ_TIM2_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM2_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM2_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM2 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM2
gpt_lld_serve_interrupt(&GPTD2);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM2
icu_lld_serve_interrupt(&ICUD2);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM2
pwm_lld_serve_interrupt(&PWMD2);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim20.inc
* @brief Shared TIM20 handler.
*
* @addtogroup STM32_TIM20_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM20_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM20_TIM205_INIT() do { \
nvicEnableVector(STM32_TIM20_UP_NUMBER, \
STM32_IRQ_TIM20_UP_PRIORITY); \
nvicEnableVector(STM32_TIM20_CC_NUMBER, \
STM32_IRQ_TIM20_CC_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM20_TIM205_DEINIT() do { \
nvicDisableVector(STM32_TIM20_UP_NUMBER); \
nvicDisableVector(STM32_TIM20_CC_NUMBER); \
} while (0)
#else
#define STM32_TIM8_TIM20_INIT()
#define STM32_TIM8_TIM20_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM20_UP_PRIORITY)
#error "STM32_IRQ_TIM20_UP_PRIORITY not defined in mcuconf.h"
#endif
#if !defined(STM32_IRQ_TIM20_CC_PRIORITY)
#error "STM32_IRQ_TIM20_CC_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM20_UP_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM20_UP_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM20_CC_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM20_CC_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM20-UP interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM20_UP_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM20
gpt_lld_serve_interrupt(&GPTD20);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM20
icu_lld_serve_interrupt(&ICUD20);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM20
pwm_lld_serve_interrupt(&PWMD20);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
/**
* @brief TIM20-CC interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM20_CC_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
/* Not used by GPT.*/
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM20
icu_lld_serve_interrupt(&ICUD20);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM20
pwm_lld_serve_interrupt(&PWMD20);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim3.inc
* @brief Shared TIM3 handler.
*
* @addtogroup STM32_TIM3_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM3_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM3_TIM3_INIT() do { \
nvicEnableVector(STM32_TIM3_NUMBER, \
STM32_IRQ_TIM3_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM3_TIM3_DEINIT() do { \
nvicDisableVector(STM32_TIM3_NUMBER); \
} while (0)
#else
#define STM32_TIM3_TIM3_INIT()
#define STM32_TIM3_TIM3_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM3_PRIORITY)
#error "STM32_IRQ_TIM3_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM3_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM3_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM3 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM3_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM3
gpt_lld_serve_interrupt(&GPTD3);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM3
icu_lld_serve_interrupt(&ICUD3);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM3
pwm_lld_serve_interrupt(&PWMD3);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim4.inc
* @brief Shared TIM4 handler.
*
* @addtogroup STM32_TIM4_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM4_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM4_TIM4_INIT() do { \
nvicEnableVector(STM32_TIM4_NUMBER, \
STM32_IRQ_TIM4_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM4_TIM4_DEINIT() do { \
nvicDisableVector(STM32_TIM4_NUMBER); \
} while (0)
#else
#define STM32_TIM4_TIM4_INIT()
#define STM32_TIM4_TIM4_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM4_PRIORITY)
#error "STM32_IRQ_TIM4_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM4_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM4_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM4 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM4_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM4
gpt_lld_serve_interrupt(&GPTD4);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM4
icu_lld_serve_interrupt(&ICUD4);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM4
pwm_lld_serve_interrupt(&PWMD4);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim5.inc
* @brief Shared TIM5 handler.
*
* @addtogroup STM32_TIM5_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM5_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM5_TIM5_INIT() do { \
nvicEnableVector(STM32_TIM5_NUMBER, \
STM32_IRQ_TIM5_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM5_TIM5_DEINIT() do { \
nvicDisableVector(STM32_TIM5_NUMBER); \
} while (0)
#else
#define STM32_TIM5_TIM5_INIT()
#define STM32_TIM5_TIM5_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM5_PRIORITY)
#error "STM32_IRQ_TIM5_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM5_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM5_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM5 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM5
gpt_lld_serve_interrupt(&GPTD5);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM5
icu_lld_serve_interrupt(&ICUD5);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM5
pwm_lld_serve_interrupt(&PWMD5);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim6.inc
* @brief Shared TIM6 handler.
*
* @addtogroup STM32_TIM6_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM6_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM6_TIM6_INIT() do { \
nvicEnableVector(STM32_TIM6_NUMBER, \
STM32_IRQ_TIM6_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM6_TIM6_DEINIT() do { \
nvicDisableVector(STM32_TIM6_NUMBER); \
} while (0)
#else
#define STM32_TIM6_TIM6_INIT()
#define STM32_TIM6_TIM6_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM6_PRIORITY)
#error "STM32_IRQ_TIM6_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM6_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM6_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM6 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM6_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM6
gpt_lld_serve_interrupt(&GPTD6);
#endif
#endif
#if HAL_USE_ICU
/* Not used by ICU.*/
#endif
#if HAL_USE_PWM
/* Not used by PWM.*/
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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@ -0,0 +1,107 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim7.inc
* @brief Shared TIM7 handler.
*
* @addtogroup STM32_TIM7_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM7_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM7_TIM7_INIT() do { \
nvicEnableVector(STM32_TIM7_NUMBER, \
STM32_IRQ_TIM7_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM7_TIM7_DEINIT() do { \
nvicDisableVector(STM32_TIM7_NUMBER); \
} while (0)
#else
#define STM32_TIM7_TIM7_INIT()
#define STM32_TIM7_TIM7_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM7_PRIORITY)
#error "STM32_IRQ_TIM7_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM7_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM7_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM7 interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM7_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM7
gpt_lld_serve_interrupt(&GPTD7);
#endif
#endif
#if HAL_USE_ICU
/* Not used by ICU.*/
#endif
#if HAL_USE_PWM
/* Not used by PWM.*/
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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@ -0,0 +1,148 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIMv1/stm32_tim8.inc
* @brief Shared TIM8 handler.
*
* @addtogroup STM32_TIM8_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if defined(STM32_TIM8_IS_USED) || defined(__DOXYGEN__)
/**
* @brief IRQ vectors initialization.
*/
#define STM32_TIM8_TIM8_INIT() do { \
nvicEnableVector(STM32_TIM8_UP_NUMBER, \
STM32_IRQ_TIM8_UP_PRIORITY); \
nvicEnableVector(STM32_TIM8_CC_NUMBER, \
STM32_IRQ_TIM8_CC_PRIORITY); \
} while (0)
/**
* @brief IRQ vectors de-initialization.
*/
#define STM32_TIM8_TIM8_DEINIT() do { \
nvicDisableVector(STM32_TIM8_UP_NUMBER); \
nvicDisableVector(STM32_TIM8_CC_NUMBER); \
} while (0)
#else
#define STM32_TIM8_TIM8_INIT()
#define STM32_TIM8_TIM8_DEINIT()
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_IRQ_TIM8_UP_PRIORITY)
#error "STM32_IRQ_TIM8_UP_PRIORITY not defined in mcuconf.h"
#endif
#if !defined(STM32_IRQ_TIM8_CC_PRIORITY)
#error "STM32_IRQ_TIM8_CC_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM8_UP_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM8_UP_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM8_CC_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_TIM8_CC_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
/**
* @brief TIM8-UP interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
#if STM32_GPT_USE_TIM8
gpt_lld_serve_interrupt(&GPTD8);
#endif
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM8
icu_lld_serve_interrupt(&ICUD8);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM8
pwm_lld_serve_interrupt(&PWMD8);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
/**
* @brief TIM8-CC interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
OSAL_IRQ_PROLOGUE();
#if HAL_USE_GPT
/* Not used by GPT.*/
#endif
#if HAL_USE_ICU
#if STM32_ICU_USE_TIM8
icu_lld_serve_interrupt(&ICUD8);
#endif
#endif
#if HAL_USE_PWM
#if STM32_PWM_USE_TIM8
pwm_lld_serve_interrupt(&PWMD8);
#endif
#endif
OSAL_IRQ_EPILOGUE();
}
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

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@ -0,0 +1,119 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file STM32G4xx/stm32_isr.h
* @brief STM32G4xx ISR handler code.
*
* @addtogroup STM32G4xx_ISR
* @{
*/
#include "hal.h"
#include "stm32_tim1_tim15_tim16_tim17.inc"
#include "stm32_tim2.inc"
#include "stm32_tim2.inc"
#include "stm32_tim3.inc"
#include "stm32_tim4.inc"
#include "stm32_tim5.inc"
#include "stm32_tim6.inc"
#include "stm32_tim7.inc"
#include "stm32_tim20.inc"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Enables IRQ sources.
*
* @notapi
*/
void irqInit(void) {
#if HAL_USE_PAL
nvicEnableVector(STM32_EXTI_LINE0_NUMBER, STM32_IRQ_EXTI0_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE1_NUMBER, STM32_IRQ_EXTI1_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE2_NUMBER, STM32_IRQ_EXTI2_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE3_NUMBER, STM32_IRQ_EXTI3_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE4_NUMBER, STM32_IRQ_EXTI4_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE5_9_HANDLER, STM32_IRQ_EXTI5_9_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE10_15_HANDLER, STM32_IRQ_EXTI10_15_PRIORITY);
#endif
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
STM32_TIM1_TIM15_TIM16_TIM17_INIT();
STM32_TIM2_INIT();
STM32_TIM3_INIT();
STM32_TIM4_INIT();
STM32_TIM5_INIT();
STM32_TIM6_INIT();
STM32_TIM7_INIT();
STM32_TIM8_INIT();
STM32_TIM20_INIT();
#endif
}
/**
* @brief Disables IRQ sources.
*
* @notapi
*/
void irqDeinit(void) {
#if HAL_USE_PAL
nvicDisableVector(STM32_EXTI_LINE0_NUMBER);
nvicDisableVector(STM32_EXTI_LINE1_NUMBER);
nvicDisableVector(STM32_EXTI_LINE2_NUMBER);
nvicDisableVector(STM32_EXTI_LINE3_NUMBER);
nvicDisableVector(STM32_EXTI_LINE4_NUMBER);
nvicDisableVector(STM32_EXTI_LINE5_9_HANDLER);
nvicDisableVector(STM32_EXTI_LINE10_15_HANDLER);
#endif
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
STM32_TIM1_TIM15_TIM16_TIM17_DEINIT();
STM32_TIM2_DEINIT();
STM32_TIM3_DEINIT();
STM32_TIM4_DEINIT();
STM32_TIM5_DEINIT();
STM32_TIM6_DEINIT();
STM32_TIM7_DEINIT();
STM32_TIM8_DEINIT();
STM32_TIM20_DEINIT();
#endif
}
/** @} */

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@ -232,66 +232,94 @@
* @{
*/
/**
* @brief EXTI0..1 interrupt priority level setting.
* @brief EXTI0 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI0_1_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI0_1_PRIORITY 3
#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI0_PRIORITY 6
#endif
/**
* @brief EXTI2..3 interrupt priority level setting.
* @brief EXTI1 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI2_3_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI2_3_PRIORITY 3
#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI1_PRIORITY 6
#endif
/**
* @brief EXTI4..15 interrupt priority level setting.
* @brief EXTI2 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI4_15_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI4_15_PRIORITY 3
#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI2_PRIORITY 6
#endif
/**
* @brief EXTI3 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI3_PRIORITY 6
#endif
/**
* @brief EXTI4 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI4_PRIORITY 6
#endif
/**
* @brief EXTI9..5 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI5_9_PRIORITY 6
#endif
/**
* @brief EXTI15..10 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI10_15_PRIORITY 6
#endif
/**
* @brief EXTI16 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI16_40_41_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI16_40_41_PRIORITY 3
#define STM32_IRQ_EXTI16_40_41_PRIORITY 6
#endif
/**
* @brief EXTI17 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI17_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI17_PRIORITY 3
#define STM32_IRQ_EXTI17_PRIORITY 6
#endif
/**
* @brief EXTI19 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI19_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI19_PRIORITY 3
#define STM32_IRQ_EXTI19_PRIORITY 6
#endif
/**
* @brief EXTI20 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI20_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI20_PRIORITY 3
#define STM32_IRQ_EXTI20_PRIORITY 6
#endif
/**
* @brief EXTI21, 22, 29 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI21_22_29_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI21_22_29_PRIORITY 3
#define STM32_IRQ_EXTI21_22_29_PRIORITY 6
#endif
/**
* @brief EXTI30, 31, 32 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI30_31_32_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI30_31_32_PRIORITY 3
#define STM32_IRQ_EXTI30_31_32_PRIORITY 6
#endif
/**
@ -468,16 +496,32 @@
/*===========================================================================*/
/* IRQ priority checks.*/
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI0_1_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI0_1_PRIORITY"
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI0_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI0_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI2_3_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI2_3_PRIORITY"
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI1_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI1_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI4_15_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI4_15_PRIORITY"
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI2_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI2_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI3_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI3_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI4_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI4_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI5_9_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI5_9_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI10_15_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI10_15_PRIORITY"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI16_40_41_PRIORITY)