2009-06-01 01:32:11 -07:00
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/*
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HardwareSerial.h - Hardware serial library for Wiring
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Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2010-10-17 10:36:02 -07:00
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Modified 28 September 2010 by Mark Sproul
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2012-08-14 06:52:00 -07:00
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Modified 14 August 2012 by Alarus
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2014-02-07 07:52:10 -08:00
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Modified 3 December 2013 by Matthijs Kooijman
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2009-06-01 01:32:11 -07:00
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*/
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#ifndef HardwareSerial_h
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#define HardwareSerial_h
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#include <inttypes.h>
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2010-05-28 15:41:03 -07:00
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#include "Stream.h"
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2009-06-01 01:32:11 -07:00
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2013-04-18 09:52:48 -07:00
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// Define constants and variables for buffering incoming serial data. We're
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// using a ring buffer (I think), in which head is the index of the location
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// to which to write the next incoming character and tail is the index of the
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// location from which to read.
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2014-10-21 08:47:59 -07:00
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// NOTE: a "power of 2" buffer size is reccomended to dramatically
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// optimize all the modulo operations for ring buffers.
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2015-02-02 11:27:17 -08:00
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#if !defined(SERIAL_TX_BUFFER_SIZE)
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2013-04-18 09:52:48 -07:00
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#if (RAMEND < 1000)
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#define SERIAL_TX_BUFFER_SIZE 16
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#else
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#define SERIAL_TX_BUFFER_SIZE 64
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#endif
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#endif
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#if !defined(SERIAL_RX_BUFFER_SIZE)
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#if (RAMEND < 1000)
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#define SERIAL_RX_BUFFER_SIZE 16
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#else
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2014-03-23 15:12:00 -07:00
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#define SERIAL_RX_BUFFER_SIZE 64
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#endif
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#endif
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2014-03-24 13:40:12 -07:00
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#if (SERIAL_TX_BUFFER_SIZE>256)
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typedef uint16_t tx_buffer_index_t;
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#else
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typedef uint8_t tx_buffer_index_t;
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#endif
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#if (SERIAL_RX_BUFFER_SIZE>256)
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typedef uint16_t rx_buffer_index_t;
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#else
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typedef uint8_t rx_buffer_index_t;
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#endif
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2009-06-01 01:32:11 -07:00
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2014-01-16 04:50:59 -08:00
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// Define config for Serial.begin(baud, config);
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#define SERIAL_5N1 0x00
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#define SERIAL_6N1 0x02
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#define SERIAL_7N1 0x04
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#define SERIAL_8N1 0x06
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#define SERIAL_5N2 0x08
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#define SERIAL_6N2 0x0A
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#define SERIAL_7N2 0x0C
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#define SERIAL_8N2 0x0E
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#define SERIAL_5E1 0x20
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#define SERIAL_6E1 0x22
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#define SERIAL_7E1 0x24
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#define SERIAL_8E1 0x26
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#define SERIAL_5E2 0x28
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#define SERIAL_6E2 0x2A
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#define SERIAL_7E2 0x2C
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#define SERIAL_8E2 0x2E
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#define SERIAL_5O1 0x30
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#define SERIAL_6O1 0x32
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#define SERIAL_7O1 0x34
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#define SERIAL_8O1 0x36
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#define SERIAL_5O2 0x38
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#define SERIAL_6O2 0x3A
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#define SERIAL_7O2 0x3C
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#define SERIAL_8O2 0x3E
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2010-05-28 15:41:03 -07:00
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class HardwareSerial : public Stream
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{
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protected:
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volatile uint8_t * const _ubrrh;
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volatile uint8_t * const _ubrrl;
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volatile uint8_t * const _ucsra;
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volatile uint8_t * const _ucsrb;
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volatile uint8_t * const _ucsrc;
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volatile uint8_t * const _udr;
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Improve HardwareSerial::flush()
The flush() method blocks until all characters in the serial buffer have
been written to the uart _and_ transmitted. This is checked by waiting
until the "TXC" (TX Complete) bit is set by the UART, signalling
completion. This bit is cleared by write() when adding a new byte to the
buffer and set by the hardware after tranmission ends, so it is always
guaranteed to be zero from the moment the first byte in a sequence is
queued until the moment the last byte is transmitted, and it is one from
the moment the last byte in the buffer is transmitted until the first
byte in the next sequence is queued.
However, the TXC bit is also zero from initialization to the moment the
first byte ever is queued (and then continues to be zero until the first
sequence of bytes completes transmission). Unfortunately we cannot
manually set the TXC bit during initialization, we can only clear it. To
make sure that flush() would not (indefinitely) block when it is called
_before_ anything was written to the serial device, the "transmitting"
variable was introduced.
This variable suggests that it is only true when something is
transmitting, which isn't currently the case (it remains true after
transmission is complete until flush() is called, for example).
Furthermore, there is no need to keep the status of transmission, the
only thing needed is to remember if anything has ever been written, so
the corner case described above can be detected.
This commit improves the code by:
- Renaming the "transmitting" variable to _written (making it more
clear and following the leading underscore naming convention).
- Not resetting the value of _written at the end of flush(), there is
no point to this.
- Only checking the "_written" value once in flush(), since it can
never be toggled off anyway.
- Initializing the value of _written in both versions of _begin (though
it probably gets initialized to 0 by default anyway, better to be
explicit).
2013-04-18 12:12:01 -07:00
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// Has any byte been written to the UART since begin()
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bool _written;
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2014-03-24 13:40:12 -07:00
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volatile rx_buffer_index_t _rx_buffer_head;
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volatile rx_buffer_index_t _rx_buffer_tail;
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volatile tx_buffer_index_t _tx_buffer_head;
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volatile tx_buffer_index_t _tx_buffer_tail;
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2013-04-18 09:52:48 -07:00
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// Don't put any members after these buffers, since only the first
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// 32 bytes of this struct can be accessed quickly using the ldd
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// instruction.
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2014-03-23 15:12:00 -07:00
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unsigned char _rx_buffer[SERIAL_RX_BUFFER_SIZE];
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unsigned char _tx_buffer[SERIAL_TX_BUFFER_SIZE];
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2013-04-18 09:52:48 -07:00
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2013-04-18 02:38:13 -07:00
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public:
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2014-01-22 01:12:56 -08:00
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inline HardwareSerial(
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2009-06-01 01:32:11 -07:00
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volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
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volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
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Use constants for register bit positions in HardwareSerial
Previously, the constants to use for the bit positions of the various
UARTs were passed to the HardwareSerial constructor. However, this
meant that whenever these values were used, the had to be indirectly
loaded, resulting in extra code overhead. Additionally, since there is
no instruction to shift a value by a variable amount, the 1 << x
expressions (inside _BV and sbi() / cbi()) would be compiled as a loop
instead of being evaluated at compiletime.
Now, the HardwareSerial class always uses the constants for the bit
positions of UART 0 (and some code is present to make sure these
constants exist, even for targets that only have a single unnumbered
UART or start at UART1).
This was already done for the TXC0 constant, for some reason. For the
actual register addresses, this approach does not work, since these are
of course different between the different UARTs on a single chip.
Of course, always using the UART 0 constants is only correct when the
constants are actually identical for the different UARTs. It has been
verified that this is currently the case for all targets supported by
avr-gcc 4.7.2, and the code contains compile-time checks to verify this
for the current target, in case a new target is added for which this
does not hold. This verification was done using:
for i in TXC RXEN TXEN RXCIE UDRIE U2X UPE; do echo $i; grep --no-filename -r "#define $i[0-9]\? " /usr/lib/avr/include/avr/io* | sed "s/#define $i[0-9]\?\s*\(\S\)\+\s*\(\/\*.*\*\/\)\?$/\1/" | sort | uniq ; done
This command shows that the above constants are identical for all uarts
on all platforms, except for TXC, which is sometimes 6 and sometimes 0.
Further investigation shows that it is always 6, except in io90scr100.h,
but that file defines TXC0 with value 6 for the UART and uses TXC with
value 0 for some USB-related register.
This commit reduces program size on the uno by around 120 bytes.
2013-04-18 05:17:47 -07:00
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volatile uint8_t *ucsrc, volatile uint8_t *udr);
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2014-01-16 04:50:59 -08:00
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void begin(unsigned long baud) { begin(baud, SERIAL_8N1); }
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2012-11-02 06:24:51 -07:00
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void begin(unsigned long, uint8_t);
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2009-12-22 16:00:17 -08:00
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void end();
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2010-08-02 15:23:48 -07:00
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virtual int available(void);
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2010-07-04 16:31:55 -07:00
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virtual int peek(void);
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2010-05-28 15:41:03 -07:00
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virtual int read(void);
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2014-07-18 07:01:26 -07:00
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int availableForWrite(void);
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2010-05-28 15:41:03 -07:00
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virtual void flush(void);
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2011-10-27 08:45:13 -07:00
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virtual size_t write(uint8_t);
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2012-08-29 13:32:05 -07:00
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inline size_t write(unsigned long n) { return write((uint8_t)n); }
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inline size_t write(long n) { return write((uint8_t)n); }
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inline size_t write(unsigned int n) { return write((uint8_t)n); }
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inline size_t write(int n) { return write((uint8_t)n); }
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2009-06-01 01:32:11 -07:00
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using Print::write; // pull in write(str) and write(buf, size) from Print
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operator bool() { return true; }
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2013-04-18 02:38:13 -07:00
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// Interrupt handlers - Not intended to be called externally
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2014-01-22 01:12:56 -08:00
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inline void _rx_complete_irq(void);
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2013-04-18 02:38:13 -07:00
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void _tx_udr_empty_irq(void);
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2009-06-01 01:32:11 -07:00
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};
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2010-10-17 10:36:02 -07:00
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#if defined(UBRRH) || defined(UBRR0H)
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extern HardwareSerial Serial;
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2013-12-01 08:21:54 -08:00
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#define HAVE_HWSERIAL0
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2010-10-17 10:36:02 -07:00
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#endif
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#if defined(UBRR1H)
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extern HardwareSerial Serial1;
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#define HAVE_HWSERIAL1
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2010-10-17 10:36:02 -07:00
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#endif
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#if defined(UBRR2H)
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extern HardwareSerial Serial2;
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#define HAVE_HWSERIAL2
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2010-10-17 10:36:02 -07:00
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#endif
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#if defined(UBRR3H)
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extern HardwareSerial Serial3;
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#define HAVE_HWSERIAL3
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2009-06-01 01:32:11 -07:00
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#endif
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2011-10-27 08:45:13 -07:00
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extern void serialEventRun(void) __attribute__((weak));
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2009-06-01 01:32:11 -07:00
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#endif
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