4a36fb944b
qei driver: fix potential overflow in qeiUpdateI
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when quiUpdate isn't called for while an cnt(uint16_t) is above 32767
delta(int16_t) can overflow.
2016-05-15 20:21:20 +02:00
040c8c9ad2
qei driver: change copyright
2016-05-15 20:21:20 +02:00
6f67aa78c3
add STM32 qei (quadrature encoder interface) driver
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Code from tinito in forum thread:
http://forum.chibios.org/phpbb/viewtopic.php?f=14&t=685
Updated to chibios trunk.
2016-05-08 18:27:11 +02:00
f93efb407d
f4 platform.mk: reoder hardware
2016-05-01 02:33:23 +02:00
509816147d
fix whitespace
2016-05-01 02:33:07 +02:00
409a3f226d
FSMC: fix build on stm32f1x and stm32f3
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STM32F1,3 has no fsmc reset function so make it optional
2016-04-29 14:14:51 +02:00
14dc50c95d
add stm32f1xx port
2016-04-28 17:22:41 +02:00
9d74dd2661
STM32 mass update to current naming convention in ChibiOS
2016-04-07 16:39:12 +03:00
18b41efefa
NAND. Cosmetical improvement
2016-03-17 12:03:18 +03:00
04c11df0b2
Updated some testhal projects to new ChibiOS code
2016-03-15 10:19:56 +03:00
499335cd61
TIMCAP: Initial commit
2016-02-16 00:51:22 +01:00
771feb098d
USB-Host: Initial commit
2016-02-15 23:34:25 +01:00
c757be0c16
Fixed typo
2015-10-14 17:52:47 +03:00
a2f9bc469a
FSMC code cleanup
2015-10-14 17:46:40 +03:00
48a03708ff
Changed the way files are included to a more convenient way.
2015-08-20 17:47:21 +02:00
316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
e7a3df6c18
Improved FSMC.
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SRAM configuration is much more flexible now.
2015-08-04 13:30:01 +03:00
58f5fd1d72
Removed dependency on ST library for SDRAM
2015-06-28 22:53:44 +02:00
b872d9409c
Minor changes
2015-06-27 18:34:33 +02:00
ee1353a305
Old definitions removed
2015-06-27 18:32:58 +02:00
542d79ef90
LTDC and DMA2D ported to ChibiOS/RT 3
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+ LTDC and DMA2D peripheral drivers
+ LTDC and DMA2D demo project
2015-06-24 21:24:45 +02:00
06640e31ce
EICU. Fixed incorrect frequency calculation.
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Timers 9, 10, 11 connected to APB2 but constant in driver
initialization code was taken for APB1.
2015-06-02 15:53:58 +03:00
82973c099e
Fixed copypaste error in comment
2015-06-02 11:15:04 +03:00
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
3d45d3d4fa
EICU. Updated lld according to chibios updates.
2015-03-31 16:43:14 +03:00
0feccaa469
EICU. Updated authors.
2015-03-13 23:53:00 +03:00
6398d0d351
EICU. Low level driver moved to TIMv1 directory
2015-03-13 23:26:24 +03:00
22819b0f46
EICU. Temporal code moved to main chibios repo.
2015-03-13 23:19:12 +03:00
6f9bf595fd
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib into HEAD
2015-03-13 22:48:38 +03:00
bff52a2141
EICU. Minor improvements
2015-03-13 22:48:25 +03:00
bfac876090
EICU. Added support of single channel timers.
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Tested in hardware with TIM11.
2015-03-13 12:07:48 +03:00
ceb3c861d5
EICU improvements.
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Added field containing available channels into EICU driver structure.
This simplified driver code.
2015-03-12 18:24:49 +03:00
070bcc130c
EICU. Added const qualifier for driver pointer in some functions
2015-03-05 16:03:05 +03:00
ae1ce0ea2b
EICU. Timer widht (16-32 bits) now stored in driver field and detected durign startup
2015-03-05 15:59:32 +03:00
e75668f53b
EICU. Cosmetical cleanup
2015-03-03 22:43:25 +03:00
35c48df910
EICU. Deleted code for "fast" capture.
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Reasons:
1) It duplicates functionality of "vanilla" ICU driver
2) Fast and slow modes are mutually exclided in single timer
2015-03-03 22:24:16 +03:00
28ab149cf7
EICU. Cosmetical improvements.
2015-03-03 21:07:44 +03:00
75688209c2
EICU now able to capture data on all channels
2015-03-03 19:01:28 +03:00
4764c3ba15
EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still untested.
2015-03-01 21:09:12 +03:00
71bba80a03
EICU. Fixed some typos.
2015-03-01 14:38:24 +03:00
4e7a5796b4
Added EICU driver in HAL. Added STM32 backend for EICU.
2015-02-28 21:42:40 +03:00
4ab64b4e4e
Fixed copyrights
2014-12-06 20:15:59 +03:00
ed62d9e4d4
FSMC. SDRAM. Fixed bug with registers' memory layout
2014-10-31 03:28:04 +03:00
1f97428d5d
FSMC. SDRAM. Fixed some typos
2014-10-31 02:51:00 +03:00
1c50a03cfd
FSMC. SDRAM. Added safety mask for SDRTR register
2014-10-25 15:54:24 +03:00
e874067224
FSMC. SDRAM. Fixed delay code
2014-10-25 15:46:31 +03:00
3af04b9ee5
FSMC. SDRAM. Improved stop function
2014-10-25 15:39:21 +03:00
b47ddce74d
FSMC. SDRAM driver cleanup. Needs review.
2014-10-25 15:26:29 +03:00
e9f9ddaa12
FSMC. SDRAM architecture reworked. Needs review.
2014-10-24 21:46:17 +03:00
5f231b6aaf
FSMC. SDRAM. Style cleanup
2014-10-22 10:33:02 +03:00
Nicolas Reinecke
barthess
Fabien Poussin
Michael Spradling
Andrea Zoppi