.. |
CAN
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
DAC
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
DMA
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
GPIO
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
I2C
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
OTG
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
RTC
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Rename RTC registers
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2021-04-06 13:38:22 +02:00 |
SPI
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
TIM
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
USART
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Rename RCC -> RCU
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2021-04-06 13:38:22 +02:00 |
xWDG
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Rename Independent Watchdog registers
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2021-04-06 13:38:22 +02:00 |
gd32_isr.c
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Rename stm32_ to gd32_ , remove obsolete tim headers
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2021-04-06 13:38:21 +02:00 |
gd32_isr.h
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Renumber TIM to begin at 0
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2021-04-06 13:38:22 +02:00 |
gd32_rcu.h
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
gd32_registry.h
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Renumber TIM to begin at 0
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2021-04-06 13:38:22 +02:00 |
hal_adc_lld.c
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
hal_adc_lld.h
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
hal_efl_lld.c
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
hal_efl_lld.h
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
hal_lld.c
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Rename PWR -> PMU
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2021-04-06 13:38:22 +02:00 |
hal_lld.h
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Rename PWR -> PMU
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2021-04-06 13:38:22 +02:00 |
hal_lld_f103.h
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Add POC GD32 overclocking flags
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2021-04-06 13:38:22 +02:00 |
hal_lld_f105_f107.h
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Rename STM32F1xx -> GD32VF103
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2021-04-06 13:38:22 +02:00 |
platform.mk
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Rename ADC registers
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2021-04-06 13:38:22 +02:00 |
stm32_registry.h
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Rename UARTx to start at 0
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2021-04-06 13:38:22 +02:00 |
stm32f105xc.h
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Rename PWR -> PMU
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2021-04-06 13:38:22 +02:00 |