mirror of https://github.com/rusefi/ChibiOS.git
STM32 RCCv1: bd, hse32, pll_v2, ahb2 added. apb2 typo fixed. msi workaroud for undefined RCC_CFGR_SWS_MSI added.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14317 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
vrepetenko
parent
0e274fc310
commit
b34bcc558b
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file RCCv1/stm32_ahb3.inc
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* @brief Shared AHB3 clock handler.
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*
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* @addtogroup STM32_AHB3_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/**
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* @name SHDHPRE field bits definitions
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* @{
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*/
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#define STM32_SHDHPRE_MASK (15U << RCC_EXTCFGR_SHDHPRE_Pos)
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#define STM32_SHDHPRE_FIELD(n) ((n) << RCC_EXTCFGR_SHDHPRE_Pos)
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#define STM32_SHDHPRE_DIV1 STM32_SHDHPRE_FIELD(0U)
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#define STM32_SHDHPRE_DIV2 STM32_SHDHPRE_FIELD(8U)
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#define STM32_SHDHPRE_DIV3 STM32_SHDHPRE_FIELD(1U)
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#define STM32_SHDHPRE_DIV4 STM32_SHDHPRE_FIELD(9U)
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#define STM32_SHDHPRE_DIV5 STM32_SHDHPRE_FIELD(2U)
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#define STM32_SHDHPRE_DIV6 STM32_SHDHPRE_FIELD(5U)
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#define STM32_SHDHPRE_DIV8 STM32_SHDHPRE_FIELD(10U)
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#define STM32_SHDHPRE_DIV10 STM32_SHDHPRE_FIELD(6U)
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#define STM32_SHDHPRE_DIV16 STM32_SHDHPRE_FIELD(11U)
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#define STM32_SHDHPRE_DIV32 STM32_SHDHPRE_FIELD(7U)
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#define STM32_SHDHPRE_DIV64 STM32_SHDHPRE_FIELD(12U)
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#define STM32_SHDHPRE_DIV128 STM32_SHDHPRE_FIELD(13U)
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#define STM32_SHDHPRE_DIV256 STM32_SHDHPRE_FIELD(14U)
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#define STM32_SHDHPRE_DIV512 STM32_SHDHPRE_FIELD(15U)
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#define STM32_SHDHPREF_MASK (1U << RCC_EXTCFGR_SHDHPREF_Pos)
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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/* Checks on configurations.*/
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#if !defined(STM32_SHDHPRE)
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#error "STM32_SHDHPRE not defined in mcuconf.h"
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#endif
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/**
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* @brief AHB3 HCLK3/PCLK3 frequency.
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*/
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#if (STM32_SHDHPRE == STM32_SHDHPRE_DIV1) || defined(__DOXYGEN__)
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#define STM32_HCLK3 (STM32_SYSCLK / 1)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV2
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#define STM32_HCLK3 (STM32_SYSCLK / 2)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV4
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#define STM32_HCLK3 (STM32_SYSCLK / 3)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV4
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#define STM32_HCLK3 (STM32_SYSCLK / 4)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV5
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#define STM32_HCLK3 (STM32_SYSCLK / 5)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV6
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#define STM32_HCLK3 (STM32_SYSCLK / 6)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV8
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#define STM32_HCLK3 (STM32_SYSCLK / 8)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV10
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#define STM32_HCLK3 (STM32_SYSCLK / 10)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV16
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#define STM32_HCLK3 (STM32_SYSCLK / 16)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV32
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#define STM32_HCLK3 (STM32_SYSCLK / 32)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV64
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#define STM32_HCLK3 (STM32_SYSCLK / 64)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV128
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#define STM32_HCLK3 (STM32_SYSCLK / 128)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV256
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#define STM32_HCLK3 (STM32_SYSCLK / 256)
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#elif STM32_SHDHPRE == STM32_SHDHPRE_DIV512
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#define STM32_HCLK3 (STM32_SYSCLK / 512)
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#else
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#error "invalid STM32_SHDHPRE value specified"
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -46,8 +46,8 @@
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/* Registry checks for robustness.*/
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/* Registry checks for robustness.*/
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/* Checks on configurations.*/
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/* Checks on configurations.*/
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#if !defined(STM32_PPRE1)
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#if !defined(STM32_PPRE2)
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#error "STM32_PPRE1 not defined in mcuconf.h"
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#error "STM32_PPRE2 not defined in mcuconf.h"
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#endif
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#endif
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/* Input checks.*/
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/* Input checks.*/
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@ -0,0 +1,92 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file RCCv1/stm32_bd.inc
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* @brief Shared backup domain handler.
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*
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* @addtogroup STM32_BD_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Initializes the backup domain.
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*/
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static inline void bd_init(void) {
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uint32_t bdcr;
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/* Current settings.*/
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bdcr = RCC->BDCR;
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#if HAL_USE_RTC
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/* RTC enable.*/
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if ((bdcr & RCC_BDCR_RTCEN) == 0U) {
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bdcr |= RCC_BDCR_RTCEN;
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}
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#endif
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/* Selectors.*/
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bdcr &= ~(STM32_RTCSEL_MASK | STM32_LSCOSEL_MASK);
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bdcr |= STM32_RTCSEL | STM32_LSCOSEL;
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/* Final settings.*/
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RCC->BDCR = bdcr;
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}
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/**
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* @brief Resets the backup domain.
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* @note WARNING! Changing RTC clock source impossible without reset
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* of the whole BKP domain.
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*/
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static inline void bd_reset(void) {
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/* Reset BKP domain if different clock source selected.*/
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if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL) {
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/* Backup domain reset.*/
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RCC->BDCR = RCC_BDCR_BDRST;
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RCC->BDCR = 0U;
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}
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -0,0 +1,116 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file RCCv1/stm32_hse32.inc
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* @brief Shared HSE32 clock handler.
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*
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* @addtogroup STM32_HSE32_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/**
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* @brief HSE32 clock frequency.
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*/
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#define STM32_HSI32CLK 32000000
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_RCC_HAS_HSE32)
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#error "STM32_RCC_HAS_HSE32 not defined in stm32_registry.h"
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#endif
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/* Checks on configurations.*/
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#if !defined(STM32_HSE32_ENABLED)
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#error "STM32_HSE32_ENABLED not defined in mcuconf.h"
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#endif
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#if defined(STM32_HSECLK)
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#error "STM32_HSECLK should not be defined in board.h"
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#endif
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#if defined(STM32_HSE_ENABLED)
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#error "STM32_HSE_ENABLED should not be defined in mcuconf.h"
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#endif
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#if STM32_HSE32_ENABLED
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/* HSE clock frequency.*/
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#if STM32_HSE32PRE == STM32_HSE32PRE_DIV1
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#define STM32_HSECLK STM32_HSE32CLK
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#elif STM32_HSE32PRE == STM32_HSE32PRE_DIV2
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#define STM32_HSECLK (STM32_HSE32CLK / 2)
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#else
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#error "invalid STM32_HSE32PRE value specified"
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#endif
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#if !defined(STM32_HSE32SRC) || \
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(STM32_HSE32SRC != STM32_HSE32_XTAL && \
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STM32_HSE32SRC != STM32_HSE32_TCXO && \
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STM32_HSE32SRC != STM32_HSE32_EXTS)
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#error "STM32_HSE32SRC should by defined in mcuconf.h with correct value"
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#endif
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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||||||
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void hse32_init(void) {
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#if STM32_HSE32_ENABLED
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#if STM32_HSE32SRC == STM32_HSE32_TCXO
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/* Enable PB0-VDDTCXO.*/
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RCC->CR |= RCC_CR_HSEBYPPWR;
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#endif /* STM32_HSESRC == STM32_HSE_TCXO */
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/* Set HSE32 SYSCLK prescaler.*/
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RCC->CR |= STM32_HSE32PRE;
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/* HSE32 activation.*/
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RCC->CR |= RCC_CR_HSEON;
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while ((RCC->CR & RCC_CR_HSERDY) == 0)
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; /* Wait until HSE32 is stable. */
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#endif
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}
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||||||
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/*===========================================================================*/
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||||||
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/* Driver interrupt handlers. */
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||||||
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/*===========================================================================*/
|
||||||
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||||||
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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||||||
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/** @} */
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@ -148,6 +148,10 @@
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#error "invalid STM32_MSISRANGE value specified"
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#error "invalid STM32_MSISRANGE value specified"
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#endif
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#endif
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#if !defined(RCC_CFGR_SWS_MSI)
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#define RCC_CFGR_SWS_MSI 0U
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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||||||
/* Driver exported variables. */
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/* Driver exported variables. */
|
||||||
/*===========================================================================*/
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/*===========================================================================*/
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@ -0,0 +1,359 @@
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/*
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||||||
|
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
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|
||||||
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/**
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* @file RCCv1/stm32_pll_v2.inc
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* @brief Shared PLL handler v2.
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*
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* @addtogroup STM32_PLL_HANDLER
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* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local definitions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Derived constants and error checks. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/* Registry checks for robustness.*/
|
||||||
|
|
||||||
|
#if !defined(STM32_RCC_HAS_PLL)
|
||||||
|
#define STM32_RCC_HAS_PLL FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_HAS_PLL
|
||||||
|
|
||||||
|
/* Checks on configurations.*/
|
||||||
|
#if !defined(STM32_PLLSRC)
|
||||||
|
#error "STM32_PLLSRC not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLM_VALUE)
|
||||||
|
#error "STM32_PLLM_VALUE not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLN_VALUE)
|
||||||
|
#error "STM32_PLLN_VALUE not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLP_VALUE)
|
||||||
|
#error "STM32_PLLP_VALUE not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_Q && !defined(STM32_PLLQ_VALUE)
|
||||||
|
#error "STM32_PLLQ_VALUE not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLR_VALUE)
|
||||||
|
#error "STM32_PLLR_VALUE not defined in mcuconf.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Check on limits.*/
|
||||||
|
#if !defined(STM32_PLLN_VALUE_MAX)
|
||||||
|
#error "STM32_PLLN_VALUE_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLN_VALUE_MIN)
|
||||||
|
#error "STM32_PLLN_VALUE_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLM_VALUE_MAX)
|
||||||
|
#error "STM32_PLLM_VALUE_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLM_VALUE_MIN)
|
||||||
|
#error "STM32_PLLM_VALUE_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLR_VALUE_MAX)
|
||||||
|
#error "STM32_PLLR_VALUE_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLR_VALUE_MIN)
|
||||||
|
#error "STM32_PLLR_VALUE_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !STM32_RCC_PLL_HAS_Q && defined(STM32_PLLQ_VALUE_MAX)
|
||||||
|
#error "STM32_PLLQ_VALUE_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_Q && !defined(STM32_PLLQ_VALUE_MIN)
|
||||||
|
#error "STM32_PLLQ_VALUE_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLP_VALUE_MAX)
|
||||||
|
#error "STM32_PLLP_VALUE_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLP_VALUE_MIN)
|
||||||
|
#error "STM32_PLLP_VALUE_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLIN_MAX)
|
||||||
|
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLIN_MIN)
|
||||||
|
#error "STM32_PLLIN_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLVCO_MAX)
|
||||||
|
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLVCO_MIN)
|
||||||
|
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLP_MAX)
|
||||||
|
#error "STM32_PLLP_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLP_MIN)
|
||||||
|
#error "STM32_PLLP_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLQ_MAX)
|
||||||
|
#error "STM32_PLLQ_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLQ_MIN)
|
||||||
|
#error "STM32_PLLQ_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLR_MAX)
|
||||||
|
#error "STM32_PLLR_MAX not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_PLLR_MIN)
|
||||||
|
#error "STM32_PLLR_MIN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Input checks.*/
|
||||||
|
#if !defined(STM32_ACTIVATE_PLL)
|
||||||
|
#error "STM32_ACTIVATE_PLL not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLPEN)
|
||||||
|
#error "STM32_PLLPEN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_Q && !defined(STM32_PLLQEN)
|
||||||
|
#error "STM32_PLLQEN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLREN)
|
||||||
|
#error "STM32_PLLREN not defined in hal_lld.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_ACTIVATE_PLL && (STM32_PLLCLKIN == 0)
|
||||||
|
#error "PLL activation required but no PLL clock selected"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (STM32_PLLCLKIN != 0) && \
|
||||||
|
((STM32_PLLCLKIN < STM32_PLLIN_MIN) || (STM32_PLLCLKIN > STM32_PLLIN_MAX))
|
||||||
|
#error "STM32_PLLCLKIN outside acceptable range (STM32_PLLIN_MIN...STM32_PLLIN_MAX)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32_PLLM field.
|
||||||
|
*/
|
||||||
|
#if ((STM32_PLLM_VALUE >= STM32_PLLM_VALUE_MIN) && (STM32_PLLM_VALUE <= STM32_PLLM_VALUE_MAX)) || \
|
||||||
|
defined(__DOXYGEN__)
|
||||||
|
#define STM32_PLLM ((STM32_PLLM_VALUE - 1) << 4)
|
||||||
|
#else
|
||||||
|
#error "invalid STM32_PLLM_VALUE value specified"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32_PLLN field.
|
||||||
|
*/
|
||||||
|
#if ((STM32_PLLN_VALUE >= STM32_PLLN_VALUE_MIN) && \
|
||||||
|
(STM32_PLLN_VALUE <= STM32_PLLN_VALUE_MAX)) || \
|
||||||
|
defined(__DOXYGEN__)
|
||||||
|
#define STM32_PLLN (STM32_PLLN_VALUE << 8)
|
||||||
|
#else
|
||||||
|
#error "invalid STM32_PLLN_VALUE value specified"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief PLL VCO frequency.
|
||||||
|
*/
|
||||||
|
#define STM32_PLLVCO (STM32_PLLCLKIN * STM32_PLLN_VALUE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PLL VCO frequency range check.
|
||||||
|
*/
|
||||||
|
#if STM32_ACTIVATE_PLL && \
|
||||||
|
((STM32_PLLVCO < STM32_PLLVCO_MIN) || (STM32_PLLVCO > STM32_PLLVCO_MAX))
|
||||||
|
#error "STM32_PLLVCO outside acceptable range (STM32_PLLVCO_MIN...STM32_PLLVCO_MAX)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/* P output, if present. */
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
#if STM32_RCC_PLL_HAS_P || defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* @brief STM32_PLLP field.
|
||||||
|
*/
|
||||||
|
#if ((STM32_PLLP_VALUE_MIN >= STM32_PLLP_VALUE_MIN) && (STM32_PLLP_VALUE_MAX <= 32)) || \
|
||||||
|
defined(__DOXYGEN__)
|
||||||
|
#define STM32_PLLP ((STM32_PLLP_VALUE - 1) << 17)
|
||||||
|
#else
|
||||||
|
#error "invalid STM32_PLLP_VALUE value specified"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief PLL P output clock frequency.
|
||||||
|
*/
|
||||||
|
#define STM32_PLL_P_CLKOUT (STM32_PLLVCO / STM32_PLLP_VALUE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PLL-P output frequency range check.
|
||||||
|
*/
|
||||||
|
#if STM32_ACTIVATE_PLL && \
|
||||||
|
((STM32_PLL_P_CLKOUT < STM32_PLLP_MIN) || (STM32_PLL_P_CLKOUT > STM32_PLLP_MAX))
|
||||||
|
#error "STM32_PLL_P_CLKOUT outside acceptable range (STM32_PLLP_MIN...STM32_PLLP_MAX)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#else /* !STM32_RCC_PLL_HAS_P */
|
||||||
|
#define STM32_PLLP 0
|
||||||
|
#define STM32_PLLPEN 0
|
||||||
|
#endif /* !STM32_RCC_PLL_HAS_P */
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/* Q output, if present. */
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
#if STM32_RCC_PLL_HAS_Q || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32_PLLQ field.
|
||||||
|
*/
|
||||||
|
#if ((STM32_PLLQ_VALUE >= STM32_PLLQ_VALUE_MIN) && (STM32_PLLQ_VALUE <= STM32_PLLQ_VALUE_MAX)) || \
|
||||||
|
defined(__DOXYGEN__)
|
||||||
|
#define STM32_PLLQ ((STM32_PLLQ_VALUE - 1) << 25)
|
||||||
|
#else
|
||||||
|
#error "invalid STM32_PLLQ_VALUE value specified"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief PLL Q output clock frequency.
|
||||||
|
*/
|
||||||
|
#define STM32_PLL_Q_CLKOUT (STM32_PLLVCO / STM32_PLLQ_VALUE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PLL-Q output frequency range check.
|
||||||
|
*/
|
||||||
|
#if STM32_ACTIVATE_PLL && \
|
||||||
|
((STM32_PLL_Q_CLKOUT < STM32_PLLQ_MIN) || (STM32_PLL_Q_CLKOUT > STM32_PLLQ_MAX))
|
||||||
|
#error "STM32_PLL_Q_CLKOUT outside acceptable range (STM32_PLLQ_MIN...STM32_PLLQ_MAX)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief PLL Q output clock frequency.
|
||||||
|
*/
|
||||||
|
#define STM32_PLL_Q_CLKOUT (STM32_PLLVCO / STM32_PLLQ_VALUE)
|
||||||
|
|
||||||
|
#else /* !STM32_RCC_PLL_HAS_Q */
|
||||||
|
#define STM32_PLLQ 0
|
||||||
|
#define STM32_PLLQEN 0
|
||||||
|
#endif /* !STM32_RCC_PLL_HAS_Q */
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/* R output, if present. */
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
#if STM32_RCC_PLL_HAS_R || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32_PLLR field.
|
||||||
|
*/
|
||||||
|
#if ((STM32_PLLR_VALUE >= STM32_PLLR_VALUE_MIN) && (STM32_PLLR_VALUE <= STM32_PLLP_VALUE_MAX)) || \
|
||||||
|
defined(__DOXYGEN__)
|
||||||
|
#define STM32_PLLR ((STM32_PLLR_VALUE - 1) << 29)
|
||||||
|
#else
|
||||||
|
#error "invalid STM32_PLLR_VALUE value specified"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief PLL R output clock frequency.
|
||||||
|
*/
|
||||||
|
#define STM32_PLL_R_CLKOUT (STM32_PLLVCO / STM32_PLLR_VALUE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PLL-R output frequency range check.
|
||||||
|
*/
|
||||||
|
#if STM32_ACTIVATE_PLL && \
|
||||||
|
((STM32_PLL_R_CLKOUT < STM32_PLLR_MIN) || (STM32_PLL_R_CLKOUT > STM32_PLLR_MAX))
|
||||||
|
#error "STM32_PLL_R_CLKOUT outside acceptable range (STM32_PLLR_MIN...STM32_PLLR_MAX)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#else /* !STM32_RCC_PLL_HAS_R */
|
||||||
|
#define STM32_PLLR 0
|
||||||
|
#define STM32_PLLREN 0
|
||||||
|
#endif /* !STM32_RCC_PLL_HAS_R */
|
||||||
|
|
||||||
|
//// old
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported variables. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local variables. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
static inline void pll_init(void) {
|
||||||
|
|
||||||
|
#if STM32_ACTIVATE_PLL
|
||||||
|
/* PLLM and PLLSRC are common to all PLLs.*/
|
||||||
|
RCC->PLLCFGR = STM32_PLLR | STM32_PLLREN |
|
||||||
|
STM32_PLLQ | STM32_PLLQEN |
|
||||||
|
STM32_PLLP | STM32_PLLPEN |
|
||||||
|
STM32_PLLN | STM32_PLLM |
|
||||||
|
STM32_PLLSRC;
|
||||||
|
|
||||||
|
/* PLL activation.*/
|
||||||
|
RCC->CR |= RCC_CR_PLLON;
|
||||||
|
|
||||||
|
/* Waiting for PLL lock.*/
|
||||||
|
while ((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||||
|
;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void pll_deinit(void) {
|
||||||
|
|
||||||
|
/* PLL de-activation.*/
|
||||||
|
RCC->PLLCFGR &= ~RCC_CR_PLLON;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver interrupt handlers. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#endif /* STM32_RCC_HAS_PLL */
|
||||||
|
|
||||||
|
/** @} */
|
||||||
Loading…
Reference in New Issue