Eliminated the duplicated MSC functions in the architecture specific files and moved to a shared common.
Improved the activity indicating LED and made it consistent between onboard flash and sd card mass storage mode.
F405 working (OMNIBUSF4SD target)
F411 not tested
F722 working, needs testing (OMNINXT7 target)
F74x not working
NOX target (temporary)
bb_dshot with telemetry on f4
bbshot f7 targets and fix crash due to missing debug pins
remove empty line
add empty lines
remove OMNIBUSF4 specific debug pins
add missing comma
add missing comma
Use separate bbTimerHardware array to fix unified targets
eliminate now unneeded timerGetByUsage
don't duplicate timer1 def
Add auto mode, rename dshot_bbshot to dshot_bitbang
remove newline
renamve various files
various changes to address feedback
address feedback
address feedback
add pacer timers to timer show
don't disable telemetry if dshot_bitbang is on or auto
Address feedback, add faster decode implementation based on bit banding, modify dma parameters to reduce required memory bandwidth on half
remove debug output
remove NOINLINE
Protect gpio direction change with critical sections
FIXWS_SAVE_INDEX
add static back in
no forward typedef
address review feedback
disallow proshot1000 with dshot bitbang
Extracted and plumbed up 'dbgPin'.
* Revert "Revert "Rewritten F7 dshot to LL (draft)" (#5430)"
This reverts commit aa42a69d2f.
* Reworked F7 linker scripts to maximize performance of both F74x and F72x
* Some comments and changes from original F7 HAL DSHOT
* Prohibit inlining of some functions to place them in ITCM-RAM
* Fixed usartTargetConfigure implicit declaration
* Moved back to SRAM1 as main RAM
* Added SRAM2 attribute
* Fixed LL DSHOT FOR SPRF7DUAL and probably other adv TIM users
* Fixed SPRF7DUAL rev. A motor order
* Enabled CCM for data on F40x
* Fixed F7 startup assembly symbols
* Fixed KISSFCV2F7 linker script
* Added a quick way of building F7 targets only
* Got rid of the useless F7 target script
* Added NOINLINE and got rid of useless __APPLE__ define
* Added some important functions to ITCM
* Added NOINLINE macro for tests
* Copy to ITCM before passing execution into it
* Minimized cache footprint of motor output code
* Evicted low-impact functions from ITCM
* Switched MATEKF722 and SPRACINGF7DUAL to burst DSHOT
* Switched CLRACINGF7 to burst DSHOT
* Moved UART RX&TX buffers to DTCM-RAM to avoid cache incoherency
* Marked taskMainPidLoop for ITCM-RAM, disallowed inlining per-function
* Revert "Added a quick way of building F7 targets only"
This reverts commit 22945189980deaf493be54a5056a080e7edad629.
* CF/BF - Update DSP_Lib and STM32F7/Drivers/CMSIS to CMSIS 5.3.0.
CMSIS 5.3.0 - https://github.com/ARM-software/CMSIS_5/releases/tag/5.3.0
* cleanup lib.
* pfft
* relocate driver files from lib/main/CMSIS/CM* to lib/main/STM32xx
folders
* Move DSP folder inside CM5.
It came from the same source as the other files inside CM5
* Remove the CM5 folder and move the files in it one level up.
* CF/BF - Set STM32F7 SPI FAST clock to 13.5Mhz - Gyros not stable at
27mhz.
* CF/BF - Initial SPRacingF7DUAL commit.
Support two simultaneous gyro support (code by Dominic Clifton and Martin Budden)
There are new debug modes so you can see the difference between each gyro.
Notes:
* spi bus instance caching broke spi mpu detection because the detection
tries I2C first which overwrites the selected bus instance when using
dual gyro.
* ALL other dual-gyro boards have one sensor per bus. SPRacingF7DUAL is has two per bus and thus commit has a lot of changes to fix SPI/BUS/GYRO initialisation issues.
* CF/BF - Add SPRacingF4EVODG target.
This target adds a second gyro to the board using the SPI pads on the back of the board.
* CF/BF - Temporarily disable Gyro EXTI pin to allow NEO target to build.
Michael Keller
jflyper
Bruce Luckcuck
Thorsten Laux
blckmn
Andrey Mironov
jflyper
Chris
Dominic Clifton
Martin Budden
Steffen Windoffer
felix
Anders Hoglund
Sami Korhonen