Basic system files
- Initial system files
- Additional RCC clock enables for testing
- Coding style tidy (target/system_stm32h7xx.c) and enable MCO for testing
- Clock generator changes for SPI support
- Setup MPU for "D2 SRAM as write-through by MPU, call it DMA_RAM"
- Drop USB clock enabling from driver/system_stm32h7xx.c
- stm32h7_hal_conf.h for persistent object storage
Basic build files
STM32H7.mk changes
- STM32H7.mk for USE_UART and USE_SERIAL_RX
- Modify STM32H7.mk for inclusion of SPI driver
- STM32H7.mk change for D2 SRAM as write-through by MPU, call it DMA_RAM
- STM32H7.mk for DMA facility
- STM32H7.mk for [TIMER] For "Initial cut without Dshot"
- STM32H7.mk change for [LED_STRIP] Add LED_STRIP
- STM32H7.mk for [ADC] Initial cut without internal sensors
- STM32H7.mk for Enable I2C (HAL)
- STM32H7.mk for "Enable HAL-based DShot (no burst yet)"
- STM32H7.mk change for transponder
- STM32H750 - Add platform support.
- STM32H750 - Add H750 MCU ID.
- STM32H743 - Add MCU ID.
STM32H7.mk change for "Burst Dshot First working version"
Fix boot loader request
STM32H750 - Add PERSISTENT memory support.
STM32H743 - Add PERSISTENT memory support.
Use PERSISTENT memory for bootloader request.
Using DTCM RAM did not work on H750.
Change flash latency from 4WS to 2WS
STM32H750 - Fix reset of RCC_CR to reset value.
Note: The comment above the code didn't match code.
STM32H750 - Remove duplicate startup code, see SystemClock_Config.
STM32H7.mk changes for Port RTC backup register based persistent storage for H7
Make use of persistent object facility
Force reboot after possible boot loader activity
Enable CRS
stm32h7xx_hal_conf.h for H7 - QuadSPI support
stm32h7xx_hal_conf.h for STM32H7 - SDCard/SDIO using HAL Driver
stm32h7xx_hal_conf.h : Fix systick to be 0x00 instead of ST's default 0x0F.
This fixes the ability to use HAL_Delay() from an ISR, as required by
the ST's USB Library.
Specifically, systick handler must be a higher priority than the USB
FS/HS Interrupt handler priorities.
stm32h7xx_hal_conf.h for Add PID-Audio support
source.mk for H7 - QuadSPI support
drivers/system_stm32h7xx.c for H7 - QuadSPI support
STM32H7.mk for H7 - QuadSPI support
STM32H7.mk change for CDC-HID support
common_pre.h updates
- Scheduler parameters to same as F4 & F7
- Enable some important default features
- STM32H7 - Enable ITCM RAM.
Requires voltage scaling fix from commit
6e684c609310024141c43de484a5e78103140e3c
STM32H750 - Disable caches before reboot.
Prior to this when EEPROM_IN_RAM was used the persistent data section
would have corruption immediately after a reboot, prior to even the
Reset_Handler code having been executed.
drivers/system_stm32h7xx.c Touch-up after 2019-02-02 rebase
STM32H7 - Write protect ITCM ram.
Remove local defs for RESET_xxx symbols
STM32H750 - EXST firmware reboots to FLASH bootloader, rather than ROM bootloader.
STM32H750 - Disable some MCO/clock testing code as the pins interfere with new targets.
STM32H750 - Don't disable data caches after bootloader.
Observed that disabling dcache after cold boot with BOOT pin high causes
segfault.
drivers/system_stm32h7xx.c for STM32H7 - SDCard/SDIO using HAL Driver
drivers/system_stm32h7xx.c change for Move SDMMC clock init into SDIO driver
drivers/system_stm32h7xx.c: Cleanup some Clock/MCO/GPIO initialisation code.
drivers/system_stm32h7xx.c for Reset if systick is stuck.
STM32H7 - Fix missing CPU voltage scaling.
It appears this was the cause of other seemingly random issues:
* Crash soon after enabling USB.
* Flash write failures.
* Random un-explainable crashes.
Change RCC_HSE_BYPASS to RCC_HSE_ON
Even Nucleo-H743 seems to work without setting HSE_BYPASS.
STM32H7xx - Move memory section initialisation earlier into the init sequence.
Allows startup-code/libs/etc to be moved into different memory regions.
Don't touch vector table in EXST targets
STM32H750_EXST - fix boot loop
target/system_stm32h7xx.c for STM32H7 - SDCard/SDIO using HAL Driver
target/system_stm32h7xx.c change for Fix SD card clock speed selection
STM32H750_EXST - Reset MPU regions on boot.
* Failure to reset regions will result in mem-fault if bootloader has
configured a similar region.
STM32H750 - Fix missing include of platform.h in system_stm32h7xx.c
This caused the SDMMC peripheral clock to be un-configured (at reset
state) when USE_SDCARD_SDIO was defined.
Change MPU region number for DMA_RAM from 0 to 1
Avoid conflict with ITCM-RAM write protection.
STM32H7xx - HSERDY slow/stuck workarounds.
STM32H7xx - Fix region MPU number for SDIO.
* It was overwriting the previous region causing LED strip and
transponder issues.
Target/system_stmh7xx.c for Reset if systick is stuck.
startup/system_stm32h7xx.c change for non-caching DMA_RAM
H750 - Use SIZE optimization by default due to limited flash space.
STM32H7.mk for STM32H7 - SDCard/SDIO using HAL Driver
STM32H7.mk updates
- Decrease HSE_STARTUP_TIMEOUT to 1 second
* default is 5 seconds, which is too long when HSE gets stuck.
- Add PID-Audio support
Temporary override LINKER_DIR
* Revert "Revert "Rewritten F7 dshot to LL (draft)" (#5430)"
This reverts commit aa42a69d2f.
* Reworked F7 linker scripts to maximize performance of both F74x and F72x
* Some comments and changes from original F7 HAL DSHOT
* Prohibit inlining of some functions to place them in ITCM-RAM
* Fixed usartTargetConfigure implicit declaration
* Moved back to SRAM1 as main RAM
* Added SRAM2 attribute
* Fixed LL DSHOT FOR SPRF7DUAL and probably other adv TIM users
* Fixed SPRF7DUAL rev. A motor order
* Enabled CCM for data on F40x
* Fixed F7 startup assembly symbols
* Fixed KISSFCV2F7 linker script
* Added a quick way of building F7 targets only
* Got rid of the useless F7 target script
* Added NOINLINE and got rid of useless __APPLE__ define
* Added some important functions to ITCM
* Added NOINLINE macro for tests
* Copy to ITCM before passing execution into it
* Minimized cache footprint of motor output code
* Evicted low-impact functions from ITCM
* Switched MATEKF722 and SPRACINGF7DUAL to burst DSHOT
* Switched CLRACINGF7 to burst DSHOT
* Moved UART RX&TX buffers to DTCM-RAM to avoid cache incoherency
* Marked taskMainPidLoop for ITCM-RAM, disallowed inlining per-function
* Revert "Added a quick way of building F7 targets only"
This reverts commit 22945189980deaf493be54a5056a080e7edad629.
* Add Composite CDC+HID device option.
- It passes on though HID interface 8 channels received from TX
- Endpoints are reconfigured to support HID interface
- Potentially this can slow down SPI Flash transfer though CDC interface...
- This could be addressed by support for MSC when using SPI Flash (emulating FATFS)
* Different way to handle MIN redefine
* CF/BF - Update DSP_Lib and STM32F7/Drivers/CMSIS to CMSIS 5.3.0.
CMSIS 5.3.0 - https://github.com/ARM-software/CMSIS_5/releases/tag/5.3.0
* cleanup lib.
* pfft
* relocate driver files from lib/main/CMSIS/CM* to lib/main/STM32xx
folders
* Move DSP folder inside CM5.
It came from the same source as the other files inside CM5
* Remove the CM5 folder and move the files in it one level up.
* CF/BF - Set STM32F7 SPI FAST clock to 13.5Mhz - Gyros not stable at
27mhz.
* CF/BF - Initial SPRacingF7DUAL commit.
Support two simultaneous gyro support (code by Dominic Clifton and Martin Budden)
There are new debug modes so you can see the difference between each gyro.
Notes:
* spi bus instance caching broke spi mpu detection because the detection
tries I2C first which overwrites the selected bus instance when using
dual gyro.
* ALL other dual-gyro boards have one sensor per bus. SPRacingF7DUAL is has two per bus and thus commit has a lot of changes to fix SPI/BUS/GYRO initialisation issues.
* CF/BF - Add SPRacingF4EVODG target.
This target adds a second gyro to the board using the SPI pads on the back of the board.
* CF/BF - Temporarily disable Gyro EXTI pin to allow NEO target to build.
jflyper
Thorsten Laux
blckmn
Andrey Mironov
jflyper
Chris
Michael Keller
Dominic Clifton
Martin Budden
Steffen Windoffer
felix
Anders Hoglund
Sami Korhonen
cs8425