Application of
Use union to access access size sensitive registers (7a0d3e7)
to V1.4.0
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Note from "Use union to access access size sensitive registers (7a0d3e7)":
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Use union to access access size sensitive registers
As described in RM0433 section 49.4.13 "Data packing", STM32H7's SPI data register supports data packing and it is sensitive to actual access width.
The original code used pointer casting to obtain a code to access the register in a desired size.
However, these operation results in strict aliasing warnings (deferencing punned pointer) and are not desirable.
Here, we declare a union that allow access to a 32-bit register in 8, 16 or 32-bit width and cast pointer to the original RXDR and TXDR data registers and then access the portion of the register through an appropriate union member.
XXX FIXME Only handled 16-bit access case, as 32-bit (original declaration) and 8-bit (allowed) cases do not generate warnings, but these should be handled similarly for correctness and consistency of the code.
- stm32h7xx_hal_rcc.c: Prevent signed-unsigned comparison warning
- [USBLIB] Take care of unused parameters
- [LIB] Stop signed-unsigned comparison warning (rcc_ex)
- Modify HAL SPI driver for const-ness to match call from current bus_spi driver
- [LIB] Handle unused in stm32h7xx_hal_flash.c
- UNUSED care for stm32h7xx_hal_rtc_ex.c
- UNUSED care for stm32h7xx_hal_pwr.c
- UNUSED care for stm32h7xx_hal_pcd.c
- UNUSED care for stm32h7xx_hal_flash.c
- UNUSED care for stm32h7xx_hal_adc_ex.c
As described in RM0433 section 49.4.13 "Data packing", STM32H7's SPI data register supports data packing and it is sensitive to actual access width.
The original code used pointer casting to obtain a code to access the register in a desired size.
However, these operation results in strict aliasing warnings (deferencing punned pointer) and are not desirable.
Here, we declare a union that allow access to a 32-bit register in 8, 16 or 32-bit width and cast pointer to the original RXDR and TXDR data registers and then access the portion of the register through an appropriate union member.
XXX FIXME Only handled 16-bit access case, as 32-bit (original declaration) and 8-bit (allowed) cases do not generate warnings, but these should be handled similarly for correctness and consistency of the code.
Fixed a bug in the STM libraries to set the write protected bin in the device config for the mass storage SCSI sense code 6 and 10. Previously the `isWriteProtected()` result was only being examined during write attempts and they correctly failed and returned a `NOT_READY` response (we don't support writes for SPIFLASH). Unfortunately since the device was not flagged as write protected on MacOS the operating system would try to write to the device and this would fail causing the operating system to think the device wasn't ready and refuse to mount it.
General fixes:
Ensured that the filesystem appears to be at least 256MB so that the volume will be treated as FAT32 instead of FAT16. A hidden "padding.txt" file is created to represent the extra space.
Fix the directory structure to only create the "btfl_all.bbl" file if there were any logs found. Previously it would always be created and this would lead to directory corruption.
Fix the size calculation for the "btfl_all.bbl" file. Previously it was being set to the total flash size rather than the used space.
* Moved ART Prefetch enabling from library to main code
* Fixed tabs to spaces
* Added F7 LL EX header to simplify work with DMA and TIM
* Refactored F7 DSHOT using LL EX
* Got rid of overlooked duplicate lines
* Revert "Revert "Rewritten F7 dshot to LL (draft)" (#5430)"
This reverts commit aa42a69d2f.
* Reworked F7 linker scripts to maximize performance of both F74x and F72x
* Some comments and changes from original F7 HAL DSHOT
* Prohibit inlining of some functions to place them in ITCM-RAM
* Fixed usartTargetConfigure implicit declaration
* Moved back to SRAM1 as main RAM
* Added SRAM2 attribute
* Fixed LL DSHOT FOR SPRF7DUAL and probably other adv TIM users
* Fixed SPRF7DUAL rev. A motor order
* Enabled CCM for data on F40x
* Fixed F7 startup assembly symbols
* Fixed KISSFCV2F7 linker script
* Added a quick way of building F7 targets only
* Got rid of the useless F7 target script
* Added NOINLINE and got rid of useless __APPLE__ define
* Added some important functions to ITCM
* Added NOINLINE macro for tests
* Copy to ITCM before passing execution into it
* Minimized cache footprint of motor output code
* Evicted low-impact functions from ITCM
* Switched MATEKF722 and SPRACINGF7DUAL to burst DSHOT
* Switched CLRACINGF7 to burst DSHOT
* Moved UART RX&TX buffers to DTCM-RAM to avoid cache incoherency
* Marked taskMainPidLoop for ITCM-RAM, disallowed inlining per-function
* Revert "Added a quick way of building F7 targets only"
This reverts commit 22945189980deaf493be54a5056a080e7edad629.
- For now disables Composite (it can be enabled, with USB_CDC_HID define)
- Modified descriptors so they are properly recognized
- Changed PID for Composite device (otherwise it doesn't work probably due to windows feature - automatically finding drivers based on those values)
* Add Composite CDC+HID device option.
- It passes on though HID interface 8 channels received from TX
- Endpoints are reconfigured to support HID interface
- Potentially this can slow down SPI Flash transfer though CDC interface...
- This could be addressed by support for MSC when using SPI Flash (emulating FATFS)
* Different way to handle MIN redefine
* Support DTR in serial passthrough mode to enable programming of Arduino
based devices such as MinimOSD.
Use 'serialpassthrough 5 57600 rxtx 56' and then use Ardino to program MinimOSD
Use 'serialpassthrough 5 115200' and then use MWOSD configurator to setup
* Fix comment for CDC_SetCtrlLineStateCb routine
* Handle F7 CDC interface
* Use strToPin() to allow easy port/pin specification
* Fix use of CDC_SetCtrlLineStateCb for all processor types
* Only set baud when specified
* Fix unit tests for cli
* Only register callback if needed
* Fix white space
* Provide implementation of IOConfigGPIO in SITL
* Update serialpassthrough help text
* DTR handling through serial drivers
* Fix F3, F7 and SITL builds
* If serialpassthrough command specifies baud rate of 0, set baud rate over USB. MWOSD configurator can now access config and reflash MinimOSD without rebooting and changing baud rate.
* Fix F3 build
* Fix failing unit tests
* Use resources to declare DTR pin assignment
* Don't assert DTR during normal operation as MW_OSD doesn't like it
* MW_OSD must be built with MAX_SOFTRESET defined in order to support DTR resets
* Minimise changes after dropping DTR pin param from serialpassthrough cmd
* Remove DTR pin param from serialpassthrough cmd
* Treat ioDtrTag as boolean in conditional statements
* Tidy buffer check
* Check buffer size in CDC_Itf_Control
* Fix unit test
* Add documentation for DTR
* Add note on MAX_SOFTRESET to documentation
* Remove superfluous function definitions
* Fix tabs
* Fix tabs
* Removed superfluous entried from vtable
* Backout whitespace changes unrelated to this PR
* Pass true/false to IOWrite()
* Fix line coding packing
* Add LINE_CODING structure defintion
* Revise serial documentation
* Prevent tx buffer overflow in serialPassthrough()
* Revert change unrelated to PR
* Review feedback from ledvinap
* Fix unit test
* Use PINIO to drive DTR
* Fix unit test
* Remove change unrelated to PR
* Fix SITL build
* Use shifted bits for mask definition
* Fix serialpassthrough documentation
* Only compile PINIO functionality if USE_PINIO defined
* IOConfigGPIO not needed
* Move cbCtrlLine callback to cli.c
* serialPassthrough params changed
* Check packed structure size
* Fix unit test
* Tidy up baud rate handling
* CF/BF - Update DSP_Lib and STM32F7/Drivers/CMSIS to CMSIS 5.3.0.
CMSIS 5.3.0 - https://github.com/ARM-software/CMSIS_5/releases/tag/5.3.0
* cleanup lib.
* pfft
* relocate driver files from lib/main/CMSIS/CM* to lib/main/STM32xx
folders
* Move DSP folder inside CM5.
It came from the same source as the other files inside CM5
* Remove the CM5 folder and move the files in it one level up.
change F3 from CM1 to CM4
add debug flags for FFT
add bandpass filter
add different filtering apply function
add feature DYNAMIC_FILTER
replace mode GTUNE with DYNAMIC FILTER
move gyro frequency analysis into gyro loop instead of own task
need implement fake eeprom & fake IO
need implement fake system function
can compile, stuck in isEEPROMContentValid()
EEPROM in memory work
EEPROM as file should work
fix some complie warning
MSP over TCP work (add dyad.c)
a little clean up
fix FLASH_CONFIG_Size in ld script & implement some pwmout
IO to simulator work!! need to check direction & scale!!
can fly but Gyro buggy
move dyad.c
fix busy-loop (limit to max 20kHz)
can simulatie in different speed now! (hard code)
add option for IMU calculation
add README.md
move dyad.c and fix F3 overrun the flash size
explanation SITL in README.md and reuse CFLAGS, ASFLAGS
Fixes the LTO build with GCC 4.9. Tested on the STM32F3DISCOVERY. I
assume the compiler was doing cross function optimisation, saw that
the same non-volatile address was read twice, and dropped the second
read.
Fixes#763.
Signed-off-by: Michael Hope <mlhx@google.com>
Dominic Clifton
jflyper
Michael Keller
Bruce Luckcuck
Andrey Mironov
conkerkh
SteveCEvans
Dominic Clifton
Martin Budden
Adrian Miriuta
blckmn
rav
Sami Korhonen
cs8425
Michael Jakob
blckmn
Konstantin Sharlaimov (DigitalEntity)
Michael Hope