Application of
Use union to access access size sensitive registers (7a0d3e7)
to V1.4.0
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Note from "Use union to access access size sensitive registers (7a0d3e7)":
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Use union to access access size sensitive registers
As described in RM0433 section 49.4.13 "Data packing", STM32H7's SPI data register supports data packing and it is sensitive to actual access width.
The original code used pointer casting to obtain a code to access the register in a desired size.
However, these operation results in strict aliasing warnings (deferencing punned pointer) and are not desirable.
Here, we declare a union that allow access to a 32-bit register in 8, 16 or 32-bit width and cast pointer to the original RXDR and TXDR data registers and then access the portion of the register through an appropriate union member.
XXX FIXME Only handled 16-bit access case, as 32-bit (original declaration) and 8-bit (allowed) cases do not generate warnings, but these should be handled similarly for correctness and consistency of the code.
- stm32h7xx_hal_rcc.c: Prevent signed-unsigned comparison warning
- [USBLIB] Take care of unused parameters
- [LIB] Stop signed-unsigned comparison warning (rcc_ex)
- Modify HAL SPI driver for const-ness to match call from current bus_spi driver
- [LIB] Handle unused in stm32h7xx_hal_flash.c
- UNUSED care for stm32h7xx_hal_rtc_ex.c
- UNUSED care for stm32h7xx_hal_pwr.c
- UNUSED care for stm32h7xx_hal_pcd.c
- UNUSED care for stm32h7xx_hal_flash.c
- UNUSED care for stm32h7xx_hal_adc_ex.c
As described in RM0433 section 49.4.13 "Data packing", STM32H7's SPI data register supports data packing and it is sensitive to actual access width.
The original code used pointer casting to obtain a code to access the register in a desired size.
However, these operation results in strict aliasing warnings (deferencing punned pointer) and are not desirable.
Here, we declare a union that allow access to a 32-bit register in 8, 16 or 32-bit width and cast pointer to the original RXDR and TXDR data registers and then access the portion of the register through an appropriate union member.
XXX FIXME Only handled 16-bit access case, as 32-bit (original declaration) and 8-bit (allowed) cases do not generate warnings, but these should be handled similarly for correctness and consistency of the code.
Fixed a bug in the STM libraries to set the write protected bin in the device config for the mass storage SCSI sense code 6 and 10. Previously the `isWriteProtected()` result was only being examined during write attempts and they correctly failed and returned a `NOT_READY` response (we don't support writes for SPIFLASH). Unfortunately since the device was not flagged as write protected on MacOS the operating system would try to write to the device and this would fail causing the operating system to think the device wasn't ready and refuse to mount it.
General fixes:
Ensured that the filesystem appears to be at least 256MB so that the volume will be treated as FAT32 instead of FAT16. A hidden "padding.txt" file is created to represent the extra space.
Fix the directory structure to only create the "btfl_all.bbl" file if there were any logs found. Previously it would always be created and this would lead to directory corruption.
Fix the size calculation for the "btfl_all.bbl" file. Previously it was being set to the total flash size rather than the used space.
* Moved ART Prefetch enabling from library to main code
* Fixed tabs to spaces
* Added F7 LL EX header to simplify work with DMA and TIM
* Refactored F7 DSHOT using LL EX
* Got rid of overlooked duplicate lines
* Revert "Revert "Rewritten F7 dshot to LL (draft)" (#5430)"
This reverts commit aa42a69d2f.
* Reworked F7 linker scripts to maximize performance of both F74x and F72x
* Some comments and changes from original F7 HAL DSHOT
* Prohibit inlining of some functions to place them in ITCM-RAM
* Fixed usartTargetConfigure implicit declaration
* Moved back to SRAM1 as main RAM
* Added SRAM2 attribute
* Fixed LL DSHOT FOR SPRF7DUAL and probably other adv TIM users
* Fixed SPRF7DUAL rev. A motor order
* Enabled CCM for data on F40x
* Fixed F7 startup assembly symbols
* Fixed KISSFCV2F7 linker script
* Added a quick way of building F7 targets only
* Got rid of the useless F7 target script
* Added NOINLINE and got rid of useless __APPLE__ define
* Added some important functions to ITCM
* Added NOINLINE macro for tests
* Copy to ITCM before passing execution into it
* Minimized cache footprint of motor output code
* Evicted low-impact functions from ITCM
* Switched MATEKF722 and SPRACINGF7DUAL to burst DSHOT
* Switched CLRACINGF7 to burst DSHOT
* Moved UART RX&TX buffers to DTCM-RAM to avoid cache incoherency
* Marked taskMainPidLoop for ITCM-RAM, disallowed inlining per-function
* Revert "Added a quick way of building F7 targets only"
This reverts commit 22945189980deaf493be54a5056a080e7edad629.
mikeller
Dominic Clifton
jflyper
Bruce Luckcuck
Andrey Mironov
conkerkh