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f1_X: adjust CAN timings for 64MHz CPU clock (cAN clock is 32MHz) (#177)

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Andrey G 2022-12-22 19:08:03 +03:00 committed by GitHub
parent 1aa7c661f6
commit cdf632652b
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 6 additions and 6 deletions
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4
firmware/boards/f1_dual/port_shared.cpp
View File

@ -6,7 +6,7 @@ const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
/*
For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values
For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1),
CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1),
};

4
firmware/boards/f1_rev2/port_shared.cpp
View File

@ -6,7 +6,7 @@ const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
/*
For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values
For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1),
CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1),
};

4
firmware/boards/f1_rev3/port_shared.cpp
View File

@ -6,7 +6,7 @@ const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
/*
For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values
For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1),
CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1),
};