Commit Graph

84 Commits

Author SHA1 Message Date
rusefillc 714efa02ca
f0_module: empty InitConfiguration (#141)
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-09-07 14:08:37 -07:00
rusefillc 7688b367e8
Ini and ts (#144)
* ini: update rev2 ini file

* f1_dual: add ini file

* f1_dual: signature

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-09-06 16:53:52 -07:00
rusefillc a57682a4b6
Rev2 progress (#143)
* Rev2: define AUX output PWM device and channels

* Rev2: enalbe TIM1 used for aux outputs

* Rev2: aux pwm pins: no need to be 50MHz fast

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-09-06 16:53:22 -07:00
Andrey G cddcd0d88c
Multichannel (#134)
* Multichannel AFR

* heater: fixes for multi channel mode

* f1_dual: fix configuration names

* pump_dac: fixes for multi-channel mode

* pwm: fixes for multichannel mode

* pump_control: reference instead of pointer

* sampling: reference instead of pointer

* heater_control: reference instead of pointer

* sampling: comment about heater/battery voltage

* f0_module: fixes for multi-channel update

* f1_rev2: fix for multichannel AFR

* hello rev 3

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-08-29 17:19:30 -07:00
rusefillc 2cc460adba
Rev3 dac (#137)
* f1_rev3: STM32 is 64-pin

* f1_rev3: enable DAC driver, enable HW block

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-08-29 17:12:49 -07:00
rusefillc 09872e0d3c
F103 rev 3 (#136)
* f1_rev3: add board support (mostly copy-paste)

* f1_rev3: add to workflows

* hal_mfs.mk - one way or another we will use MFS for sure in this repo

* SPI means EGT and EGT means SPI

* one step towards master

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-08-20 11:39:03 -07:00
rusefillc c1057ad951
f1_dual: limit max heater duty (#132)
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-08-01 00:17:06 -07:00
rusefillc 41e87292c5
Add max31855 driver (#103)
* Add max31855 driver

* f1_dual: enable EGT driver

* bit.h: bit helper

* max31855 driver progress

* max31855 driver fixing guard

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-07-20 16:36:23 -07:00
Andrey G 63ef4b7a10
TS more and more (#123)
* TunerStudio: simplify enable magic

* TS integration: livedata, FragmentEntry

* f1_dual: reorder TS hooks

* f1_rev2: dummy settings for TS

* f1_rev2: TS signature

* f1_rev2: TS ini file

* Integrate with TS interface

* livedata: access adapters, no extern, make livedata static

* FragmentEntry: no FragmentEntry()

* livedata: struct not needed
2022-07-18 12:31:09 -07:00
Andrey G 8f5a23c2bc
main: always call InitUart, get rid of ECHO_UART (#122) 2022-07-17 16:58:56 -07:00
Matthew Kennedy 6135464dc8
use libfirmware for crc, table lookup (#121)
* use libfirmware for crc

* kick

* bootloader

* bootloader

* use shared interpolate2d

* cleanup
2022-07-16 19:08:45 -07:00
rusefillc 55f65ad02d
Ts top down (#104)
* TS top down

* TS top down

* TS top down

* TS top down

* Ts top down #104

removing the controversial part

* Ts top down #104

removing the controversial part

* docs

* fix build (switch to serial)

* f1_dual: UART->Serial

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-15 11:10:15 -07:00
rusefillc cb7c9bf612
bootloader: make bootloader flash area reserve optional (#118)
and increase config flash area to 8K

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-15 11:08:44 -07:00
Andrey G 18c22abdfa
bootloader: make bootloader flash area reserve optional (#111)
* bootloader: make bootloader flash area reserve optional

and increase config flash area to 8K

* f1_rev2: empty blflash section
2022-07-15 00:07:41 -07:00
rusefillc b298389fb5
Bat measurment (#113)
* board: f1_dual: add way to measure battery through Heater-

* heater_control: allow board to limit max heater duty

* board: f1_dual: use max sample for battery measurement, filter

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-15 00:07:13 -07:00
rusefillc e51dc3ba0b
f1_dual: set O0 optimization level due to ADC issue on GD32 (#116)
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-15 00:06:44 -07:00
rusefillc ee230be7e2
Introducing dual channel board (#109)
* port: ID_SEL2_PIN is optional

Dual version is out of mcu pins and implement only one sel pin.

* board: f1_dial: add dual channel board

* GH actions: add f1_dual build to actions

* f1_dual: use uart driver, not serial

* f1_dual: setup correct remaps

* f1_dual: DEBUG: enable uart debug (disable TS)

* board: f1_dual: add way to measure battery through Heater-

* fix dual board

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-13 23:14:46 -07:00
rusefillc 87390c6218
ignoring OpenBLT artifacts (#105)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-07-13 09:18:58 -07:00
rusefillc 1561c13a15
f1_rev2: OpenBLT: update gpio and interfaces setup (#97)
* f1_rev2: OpenBLT: update gpio and interfaces setup

* f1_rev2: OpenBLT: set default board name

* f1_rev2: no need to have bootloader region in main app LD file

* f1_rev2: use gpio settings from application include file

* f1_rev2: OpenBLT: update gpio and interfaces setup

* f1_rev2: OpenBLT: close backdoor

* f1_rev2: OpenBLT: fix uart setup

* f1_rev2: OpenBLT: gracefully close CAN after use

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-04 03:50:31 -07:00
rusefillc 0119d8e716
comments (#101)
* comments

* comments

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-07-03 20:48:42 -07:00
rusefillc 1454c10713
AUX outputs (#95)
* AUX outputs

* Rev2: define AUX output PWM device and channels

* Rev2: enalbe TIM1 used for aux outputs

* Rev2: define aux output gain

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-03 12:11:12 -07:00
rusefillc fe50e80a89
original hardware by Dave has changed enough (#100)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-07-03 12:07:01 -07:00
rusefillc 542601da41
Board Rev 2 (#98)
* Board Rev 2

* f1_rev2: fix for new AnalogResult format

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-03 00:00:43 -07:00
rusefillc d1a2ee2b5b
Rev 2: default settings for LSU4.9 (#99)
* Rev 2: default settings for LSU4.9

* Rev2: LSU 4.2 and ADV ESR drive pins

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-03 00:00:17 -07:00
rusefillc 1efc499126
Rev2: GD32 ADC workaround (#96)
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-02 13:48:27 -07:00
rusefillc 0430e4a7ba
board: common make script (#73)
* board: common make script

(cherry picked from commit cb087c60e9)

* common_make -> build_f1_board

* f1_rev2: use build_f1_board.sh helper

* Add encedo hex2dfu tools (bin for linux and win)

See https://github.com/encedo/hex2dfu

* Makefile: priduce srec too

* f1_rev2: OpenBLT: build bin and hex files

* f1_rev2: OpenBLT: optimize for size to fit into 8K flash

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-02 13:47:55 -07:00
rusefillc 2fa9549d83
0701 rev2 2 (#91)
* Rev 2: VM_RESISTOR_VALUE

(cherry picked from commit 84ae91fc67cf6764afd5b00210edbc3cfe4444a5)

* Rev 2: default settings for LSU4.9

(cherry picked from commit 5a1fe84bc1ec8d7ee6e0a5f2906a1b18d2ff8a8e)

* Per-board VM_RESISTOR_VALUE

(cherry picked from commit 0bdd19e058db579bed13488066df1176ea9addb2)

* Rev2: ID correct pins

(cherry picked from commit 59e4b36ad9bc7c166c3dae7e25b6317caf562056)

* Rev2: LSU 4.2 and ADV ESR drive pins

(cherry picked from commit 2f2b4399431136951fe2fa6819f44ba28c3cda17)

* Rev2: aux pwm pins: no need to be 50MHz fast

(cherry picked from commit b0af5c07c391438ca561118174df498207255f3b)

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-01 15:57:05 -07:00
rusefillc 076406e4b0
f1_rev2: add OpenBLT (#92)
(cherry picked from commit 85e1ac8e5e75e22b247db0f5a512656453425729)

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-07-01 12:12:24 -07:00
Andrey G d3d260b828
f1_rev2: set O0 optimization level due to issue with ADC on GD32 (#94) 2022-07-01 12:10:28 -07:00
Andrey G 5ec79b52a5
f1_rev2: this is single channel board (#93) 2022-07-01 12:03:48 -07:00
rusefillc 7d8eaab3d1
Min rev2 (#90)
* Board Rev 2

(cherry picked from commit 2f1e2bd3e27fdfd43f0ccf8292aacfb1194060fc)

* CI good

(cherry picked from commit 2163af402ebc40f76fa53ac8f1648949b12aa50f)

* min r2

* min r2

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-07-01 01:17:04 -07:00
rusefillc fad49f553f
Crc bootloader (#88)
* more code reuse

* more code reuse

* more code reuse

* more code reuse

* more code reuse

* more code reuse

* make it compile and actually include all the functions

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
2022-06-30 10:07:33 -07:00
rusefillc e34094e13d
Prepare for multi-channel boards (#72)
* Prepare for multi-channel boards

(cherry picked from commit 8b713cebfc)

* this belongs in wideband_board_config.h they say

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-06-24 14:51:22 -07:00
rusefillc f6b4b3a34c
f1_dave: PA1 is pump PWM output, should be alternate (#75)
(cherry picked from commit b31e642943)

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
2022-06-22 11:10:51 -07:00
Andrey G 87763c55a4
f1_dave: port: use designated initializers (#65) 2022-05-06 22:36:44 -07:00
Andrey G bcc62880da
f1_dave: board cleanup and pinmux fixes (#56)
* f1_dave: clean-up board.h

* f1_dave: PB6 should be output+alternate

Set using VAL_GPIOBCRL, no need to call palSetPadMode

* f1_dave: PB12 ESR driver, should be high speed (hi current)

* f1_dave: PB13 - Blue LED should be output push-pull

* f1_dave: fix pinmuxes, add comments
2022-04-06 14:07:00 -07:00
Matthew Kennedy ea262c3822 battery voltage config 2022-04-06 01:07:29 -07:00
Matthew Kennedy b838c414fa sample battery voltage 2022-04-06 01:07:18 -07:00
rusefillc 3f3cb4a7ad
PB6 with hardware mod is the simplest way forward (#50)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-04-05 14:46:46 -07:00
rusefillc a981063a8b
UART (#52)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-04-04 14:18:08 -07:00
Matthew Kennedy 2849b984dd some per board config 2022-01-28 11:21:38 -08:00
Matthew Kennedy 86034506b0 can runs at 24mhz 2022-01-13 12:09:44 -08:00
rusefillc d9b83379f3
CAN options (#42)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-01-13 10:55:03 -08:00
Matthew Kennedy 660dad473c let's go back to 48 2022-01-13 10:45:12 -08:00
Matthew Kennedy 23a05968d3 run at 64MHz 2022-01-13 10:28:33 -08:00
rusefillc 51775e719b
ID pins to pinout header (#41)
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-01-11 17:44:46 -08:00
Matthew Kennedy 4f2fd95c46 f1 analog mapping 2022-01-04 11:08:17 -08:00
Matthew Kennedy 085b0419db clarify for f1 2022-01-04 11:06:01 -08:00
Matthew Kennedy b910db45ba f1 board.h 2022-01-04 11:03:09 -08:00
rusefillc cbb0665e54
Correct dac timer (#38)
* io mapping typo

* DAC uses proper timer now

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
2022-01-01 20:01:05 -08:00