Fabien Poussin
3add406135
Merge branch 'master' into update_tests
2018-03-15 12:51:14 +01:00
Fabien Poussin
dabdfca04e
Merge pull request #148 from romainreignier/add_stm32L4
...
platform: add support for STM32L4 family
2018-03-15 12:07:33 +01:00
Fabien Poussin
424c7a2717
Fixed most testhal examples for STM32, updated configs using script. Fixed deprecated MS2ST calls.
2018-03-14 20:15:13 +01:00
Romain Reignier
6513490986
platform: add support for STM32L4 family
2018-03-12 21:33:11 +01:00
Romain Reignier
e1e6f87481
hal_usbh: update to new Time macros
2018-03-12 21:20:32 +01:00
Romain Reignier
26a11251bf
hal_fsmc: update to new RCC API
2018-03-12 21:20:32 +01:00
Romain Reignier
918149d48d
hal: stm32: Keep track of latest STM32 RCC API
...
RCC API changed in 01/2018 so apply the changes.
Note that ae7a4d40b8
partially fixed the changes in QEI module but some were missing.
So update the other modules too.
2018-03-12 21:20:07 +01:00
Romain Reignier
b143e38a66
Keep track of STM32 RCC API
...
RCC API changed in 01/2018 so apply the changes.
Note that ae7a4d40b8
partially fixed the changes in QEI module but some were missing.
So update the other modules too.
2018-03-11 22:13:06 +01:00
Fabien Poussin
ae7a4d40b8
Fixes for STM32F0 testhal
2018-03-08 20:14:13 +01:00
Adrian
90b7d6bbd0
Added support for STM32F7
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Tested only for STM32F746, other chipsets have to be checked.
2018-01-31 09:55:38 +01:00
Dave Flogeras
5cc37ffd32
Add STM32F769 to FSMCv1 sdram driver
2017-12-14 16:25:15 -04:00
Diego Ismirlian
6a9d91cb1a
USBH: STM32 LLD: break LS activity detect loop if port is disabled
2017-08-07 17:47:52 -03:00
Diego Ismirlian
02585210d1
USBH: STM32 LLD: various improvements
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- general cleanup
- implemented workaround to undocumented erratum (the OTG core may
report successful enabling of port when connecting a low-speed device,
but really it generates no traffic and remains in a "dumb" state)
- improved handling of disconnection of devices (avoid submitting URBs
if the port is disabled)
2017-07-31 18:48:23 -03:00
Diego Ismirlian
dee22cee18
USBH: remove unnecessary reschedules and add necessary ones
2017-07-16 20:01:50 -03:00
Diego Ismirlian
4026bc900d
USBH: Correct bug in LLD
2017-07-16 18:19:06 -03:00
Diego Ismirlian
c938866844
USBH: moved definition of driver to LLD
2017-07-09 18:29:44 -03:00
Diego Ismirlian
d2c155b4cf
USBH: moved declaration of driver to LLD
2017-06-09 11:07:20 -03:00
Diego Ismirlian
78da479955
USBH: STM32 lld, activate correction of unexpected length
2017-06-08 12:37:24 -03:00
Diego Ismirlian
61c3a28398
Mass license dates update
2017-06-05 11:04:30 -03:00
Diego Ismirlian
a77ab485fb
Remove redundant hal_stm32_otg.h file
...
The correct version is already present in ChibiOS
2017-06-05 10:27:20 -03:00
Diego Ismirlian
5ecaf7722b
USB Host fixes
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- Cleaned up alignment macros for GCC & IAR
- Corrected EP halt and Clear halt behaviours
- Initialization of class drivers by USB Host main driver
- Minor cosmetic fixes
- Updated USB_HOST testhal app
2017-06-05 10:18:45 -03:00
Andres Vahter
c5be9cd85b
Add checks to QEI if STM32 TIM is already used
2017-06-05 09:25:37 +03:00
Romain Reignier
15517ffbd0
[DMA2D, LTDC] Removing ch.h dependencies. Fix #111 .
2017-02-28 22:59:28 +01:00
Fabien Poussin
4ffde4b17e
[Comp] Adding interrupt functions, updating example.
2017-02-09 12:30:21 +01:00
Fabien Poussin
fd89254b0d
[Comp] Adding support for STM32F0.
2017-02-07 16:08:08 +01:00
Fabien Poussin
8b7e318d78
[Comp] Adding more defines
2017-02-07 15:46:43 +01:00
Fabien Poussin
1d10f06ab4
[Comp] Adding init, helper defines.
2017-02-07 15:37:20 +01:00
Fabien Poussin
f4687bd298
[Comp] Cleaning example, removing dependencies and adding checks.
2017-02-07 15:20:28 +01:00
Fabien Poussin
7059c87ab4
[COMP] Fixing headers, missing includes.
2017-02-07 10:58:11 +01:00
Fabien Poussin
86428716d5
Adding COMP Driver.
2017-02-06 20:09:28 +01:00
Fabien Poussin
11e949d81b
[Timcap/Eeprom] Removing ch.h dependencies.
2017-02-06 13:32:36 +01:00
barthess
c09968f967
[STM32, NAND] Fixed #elif without expression
2017-01-24 12:15:04 +03:00
barthess
88c55f1aaa
FSMC NAND improvements.
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1) Implemented 16 bit bus width support
2) Added workaround errata in STM32
2017-01-17 21:10:54 +03:00
barthess
3e8fdd762a
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2017-01-06 11:06:52 +03:00
barthess
779ea88be7
NAND. Added reset function.
2017-01-06 11:06:40 +03:00
Fabien Poussin
0135ff7dd3
Merge pull request #107 from pl4nkton/stm32_fixes
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Stm32 fixes
2017-01-04 10:47:39 +01:00
barthess
53d3fd07f3
FSMC. Sync mode improvements.
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1) Control registers writes reordered in init sequence to eliminate
incorrect output clock frequnency in short period after CCLKEN bit
set and B(W)TR registers set.
2) Added reset of CCLEN bit in stop procedure.
2016-12-09 18:00:28 +03:00
Nicolas Reinecke
546ac1d584
STM32: fix USB HOST HS when cpu is in sleep mode
2016-12-05 11:47:32 +01:00
Peter
c7d33767e0
change qei types to int16_t
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
580af16b82
usbh: add otg stepping 2 code
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
de0c3e70c6
usbh: cleanup
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
00f18c55cc
whitespace
2016-11-08 21:07:23 +01:00
Nicolas Reinecke
a6158cef3c
add STM32F7 FMC write FIFO disable bit
2016-11-08 21:07:23 +01:00
Kimmo Lindholm
37700daf23
STM32 CRC : Fix asserts
2016-11-05 20:45:10 +02:00
barthess
709addd02d
Updated include guards
2016-10-17 17:23:16 +03:00
barthess
80b50d3935
[STM32 NAND] Code cleanup.
2016-08-18 11:25:08 +03:00
barthess
e1601e0a7d
[STM32 NAND] Deleted ugly hack with EXTI interrupt instead of NAND one
2016-08-16 18:00:59 +03:00
barthess
eff62993d3
[STM32 NAND] Deleted unused defines.
2016-08-16 16:20:47 +03:00
barthess
c7afdebe33
Added room for STM32F7x
2016-07-14 13:18:21 +03:00
Stephane D'Alu
f75abd1037
added qeiAdjustI. added new field and checking in STM32
2016-07-07 21:25:51 +02:00