Benjamin Vedder
a233367be8
MPU9x50 fix, experiment plots, DQ voltage RT data, smart reverse for nunchuk app
2019-09-08 18:25:38 +02:00
Benjamin Vedder
602db7435b
FW3.59. Many updates, see changelog for details
2019-09-03 20:39:05 +02:00
Benjamin Vedder
05b1a9483e
Merge branch 'Axiom-board-support' of https://github.com/powerdesigns/bldc into powerdesigns-Axiom-board-support
2019-05-04 10:44:03 +02:00
Benjamin Vedder
404bbcf64b
Fixed current offset fault bug, added support for multiple IMUs and ICM-20948
2019-05-03 19:55:36 +02:00
Marcos Chaparro
1d08745376
Axiom control board support
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Rename paltatech naming to Axiom.
For safety set Axiom default max input voltage to 0.0V so it can not run a
motor without mc_conf being explicitly configured by the user.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-04-27 08:21:46 -03:00
Marcos Chaparro
6d758b38f2
Detect current sensor failures
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2 failure modes added:
* On boot, when calculating DC offsets generate a fault if the offset is beyond
HW_MAX_CURRENT_OFFSET. Fault code reports which sensor is having issues (1, 2 or 3).
Most likely cause is a disconnected sensor, if hw has fault-detecting pullups.
* On runtime, in setups with 3 in-line phase current sensors, checks that the sum
of the currents is below MCCONF_MAX_CURRENT_UNBALANCE, with a configurable low pass
filter. If unbalanced current is high, it means a fault to ground, or a disconnected
sensor (this works at 0 Amp if hw has pullups in the sensor input to detect the
failure).
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-04-20 09:43:08 -03:00
Maximiliano Cordoba
4a94d0ec4c
Add command to connect a virtual motor with configurable parameters
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This commit adds a motor model running within the vesc firmware,and
from the vesc terminal a user or a test script can set the
mechanical load torque, inertia, phase resistance, Lq and Ld phase
inductances (this generic model includes IPM motors), flux linkage
and battery voltage.
Virtual motor parameters set at the command line should match with
vesc configuration, for example phase resistance, inductance and
flux linkage should match and have the correct observer gain.
Observer works with the virtual motor, with some hiccups during
startup
For solid results its better to use sensored mode. If vesc is
configured to use an SPI encoder the virtual motor phase angle
will be injected as an encoder angle readout.
For safety PWM outputs are disabled during simulation.
Signed-off-by: Maximiliano Cordoba <mcordoba@powerdesigns.ca>
2019-04-06 10:36:00 -03:00
Benjamin Vedder
fb9442889a
Merge pull request #80 from paltatech/powerdesigns-revB-support
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Extend support to older PowerDesigns RevB boards
2019-03-31 11:37:59 +02:00
Benjamin Vedder
1161f8417c
Added SWD programming support (based on Black Magic Probe) and open loop duty cycle control
2019-03-31 10:49:18 +02:00
Marcos Chaparro
3ab585cb9a
Force high current measuments when using big powerstages
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-03-28 20:33:21 -03:00
Marcos Chaparro
b2311b9eca
Extend support to older PowerDesigns RevB boards
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-03-25 18:02:26 -03:00
Benjamin Vedder
65298263b6
75/300 R2 support, terminal sync cmd, IMU support, option to disable permanent UART, collected timer functions in one place
2019-03-10 14:57:42 +01:00
Benjamin Vedder
01e72eb555
Autogenerated config parsing with signatures, fixed previous PRs
2019-03-01 21:36:58 +01:00
Benjamin Vedder
18b79a3a09
Fixed some issues found by codacy
2019-02-19 22:06:34 +01:00
Benjamin Vedder
c76942009b
Some fixes after the merge
2019-02-19 18:55:18 +01:00
Marcos Chaparro
32cf05629d
Resolve merge conficts with major 2019 release
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-02-18 20:25:52 -03:00
Benjamin Vedder
123bb00ab4
Major 2019 update
2019-02-18 19:30:19 +01:00
Marcos Chaparro
4ac69232d9
Configure deadtime by just defining it in nanoseconds. Firmware will calculate the required DTG register value.
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-01-31 00:51:35 -03:00
Marcos Chaparro
9652231edb
Allow to run PWM at frequencies multiples FOC loop to support applications with PWM running at 100+kHz.
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-01-30 00:33:56 -03:00
Marcos Chaparro
c59dd2b2fc
Fix shadowed variables. Add -Wshadow.
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Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
2019-01-28 16:52:02 -03:00
Marcos Chaparro
12fcffb629
Window Watchdog feed moved outside ADC ISR. Now it has the same coverage as the IWDG, with the extra capability of detecting that the timeout thread is running faster than expected.
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Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
2019-01-24 13:16:28 -03:00
Marcos Chaparro
17f97763c0
Extend watchdog coverage with IWDG, a watchdog running from an independent LF oscillator. If any of the threads being monitored does not report for more than 12ms, a reset will be asserted. When a WDG reset happens, the user can see it in the fault logs from vesc tool
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Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
2019-01-24 12:19:44 -03:00
Marcos Chaparro
add8b31975
Always measure phase resistance with MaxPhaseAmps/2 for consistent automatic resistance measurement
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Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
2019-01-08 20:30:55 -03:00
Marcos Chaparro
e284d1ae5e
Compensate for line-to-line measurement in FOC
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Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
2018-12-12 18:41:10 -03:00
Benjamin Vedder
22dc2ce33c
FW 3.37: FOC KI temp comp, configurable foc current filter
2018-03-24 22:32:58 +01:00
Benjamin Vedder
e83af32219
Some cleanup, updated speed PID controller, some NAN-checks, iterative observer
2017-10-20 20:06:06 +02:00
Benjamin Vedder
37bb857a58
Wrapped GNU_SOURCE in ifndef
2017-09-21 21:20:11 +02:00
Benjamin Vedder
7cc18a4fc3
Merge pull request #34 from kalvdans/fsincos-compilation-warning
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Include declaration of fsincos.
2017-09-21 18:41:34 +02:00
Benjamin Vedder
79bfbe6234
FW3.28: dual throttle curves, ntc beta factor config, board file added
2017-09-06 21:13:28 +02:00
Benjamin Vedder
f141157358
First official commit after the VESC Project release
2017-09-04 21:12:43 +02:00
Christian Häggström
fb8d9adf4f
Include declaration of fsincos.
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Fix compilation warning about fsincos undeclared on Linux by defining
_GNU_SOURCE before including <math.h>
2017-05-28 21:47:25 +02:00
Benjamin Vedder
5dbc94c525
FW 3.7
2016-11-04 15:18:34 +01:00
Benjamin Vedder
d2f6d87560
FW 3.0: HW60 support, 3 low/high side shunt support, permanent NRF option
2016-06-27 17:29:09 +02:00
Benjamin Vedder
ed61c4d332
FW 2.18: Better FOC sensorless startup, app adc safety fix
2016-05-19 19:24:01 +02:00
Benjamin Vedder
cb2a205cb8
FW 2.17: as5047 support, change sensor port mode in conf, better encoder detection, FOC ah and wh counter fixes
2016-04-27 15:32:32 +02:00
Benjamin Vedder
08a27cfbbd
FW 1.16: Hall sensor position control, brake at 0RPM setpoint in FOC, FOC parameter detection fix
2016-02-24 21:19:44 +01:00
Benjamin Vedder
6d33ac83b6
FW 1.13: APP_ADC input 2, interface locks during detection, inductance detection fix
2016-02-02 17:19:37 +01:00
Benjamin Vedder
02f140e335
FW 2.11: Refactoring, dead time comp fix for smoother braking when the speed is zero
2016-01-30 15:57:51 +01:00
Benjamin Vedder
e6ea308a48
FW 2.10: FOC hybrid hall sensor support with interpolation
2016-01-27 23:57:23 +01:00
Benjamin Vedder
cc17142264
Encoder position control fix
2015-12-29 02:37:09 +01:00
Benjamin Vedder
42c1b79a08
FW 2.7: Better encoder support, small UART and CAN fixes, NRF commands preparation
2015-12-28 01:50:23 +01:00
Benjamin Vedder
d995cf6749
FW 2.6: Slow abs current fix, current limit fix, FOC control CPU resource measurement, current filters, D current injection fix
2015-12-24 00:43:31 +01:00
Benjamin Vedder
2377a45bcb
FW 2.5: red LED fix on hw 4.5, updated default PID parameters
2015-12-19 21:24:46 +01:00
Benjamin Vedder
59309d9772
FW 2.4: some nan fixes that shoud prevent FOC from stopping and needing a reboot in some cases
2015-12-10 23:21:04 +01:00
Benjamin Vedder
ff090fd4e0
FW 2.3: MAJOR UPDATE: FOC!!
2015-12-08 21:01:23 +01:00