* auxout: manually fill pwm config
(cherry picked from commit a01876bc034264de5d6930bf2cc49cf0fc0cbb0a)
* auxout: some boards use primary PWM outputs instead of complementary
(cherry picked from commit c13b95441e7b284a36445c261199e96580e94ebd)
* auxout: implement ripple cancelation using inverted PWM
(cherry picked from commit 77cbc04990421b24021639b098ea6040af3a12f8)
* f1_common: default AUXOUT value is AFR voltage
with 'default' scaling 8.5 to 18.0 AFR is represented with 0.0 to
5.0V
(cherry picked from commit 0c62ab8f509ff0ab3ab4260e308ad4b55bd64e40)
---------
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* main: acctually call InitConfiguration()
* f1_rev2: enable EFL and MFS (Managed Flash Storate)
* f1_dual: enable EFL and MFS (Managed Flash Storate)
* f1 boards: extract common code
* port.h: add LoadDefaults() method to Configuration class
* f1 boards: store Configuration to MFS
* f1 boards: common getTsSignature() for all f1 boards
* Rev2: define AUX output PWM device and channels
* Rev2: enalbe TIM1 used for aux outputs
* Rev2: aux pwm pins: no need to be 50MHz fast
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* TS top down
* TS top down
* TS top down
* TS top down
* Ts top down #104
removing the controversial part
* Ts top down #104
removing the controversial part
* docs
* fix build (switch to serial)
* f1_dual: UART->Serial
Co-authored-by: rusefillc <sdfsdfqsf2334234234>
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* f1_rev2: OpenBLT: update gpio and interfaces setup
* f1_rev2: OpenBLT: set default board name
* f1_rev2: no need to have bootloader region in main app LD file
* f1_rev2: use gpio settings from application include file
* f1_rev2: OpenBLT: update gpio and interfaces setup
* f1_rev2: OpenBLT: close backdoor
* f1_rev2: OpenBLT: fix uart setup
* f1_rev2: OpenBLT: gracefully close CAN after use
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* AUX outputs
* Rev2: define AUX output PWM device and channels
* Rev2: enalbe TIM1 used for aux outputs
* Rev2: define aux output gain
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* board: common make script
(cherry picked from commit cb087c60e9)
* common_make -> build_f1_board
* f1_rev2: use build_f1_board.sh helper
* Add encedo hex2dfu tools (bin for linux and win)
See https://github.com/encedo/hex2dfu
* Makefile: priduce srec too
* f1_rev2: OpenBLT: build bin and hex files
* f1_rev2: OpenBLT: optimize for size to fit into 8K flash
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* Rev 2: VM_RESISTOR_VALUE
(cherry picked from commit 84ae91fc67cf6764afd5b00210edbc3cfe4444a5)
* Rev 2: default settings for LSU4.9
(cherry picked from commit 5a1fe84bc1ec8d7ee6e0a5f2906a1b18d2ff8a8e)
* Per-board VM_RESISTOR_VALUE
(cherry picked from commit 0bdd19e058db579bed13488066df1176ea9addb2)
* Rev2: ID correct pins
(cherry picked from commit 59e4b36ad9bc7c166c3dae7e25b6317caf562056)
* Rev2: LSU 4.2 and ADV ESR drive pins
(cherry picked from commit 2f2b4399431136951fe2fa6819f44ba28c3cda17)
* Rev2: aux pwm pins: no need to be 50MHz fast
(cherry picked from commit b0af5c07c391438ca561118174df498207255f3b)
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
* Board Rev 2
(cherry picked from commit 2f1e2bd3e27fdfd43f0ccf8292aacfb1194060fc)
* CI good
(cherry picked from commit 2163af402ebc40f76fa53ac8f1648949b12aa50f)
* min r2
* min r2
Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
Co-authored-by: rusefillc <sdfsdfqsf2334234234>