barthess
3e8fdd762a
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2017-01-06 11:06:52 +03:00
barthess
779ea88be7
NAND. Added reset function.
2017-01-06 11:06:40 +03:00
Fabien Poussin
0135ff7dd3
Merge pull request #107 from pl4nkton/stm32_fixes
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Stm32 fixes
2017-01-04 10:47:39 +01:00
barthess
53d3fd07f3
FSMC. Sync mode improvements.
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1) Control registers writes reordered in init sequence to eliminate
incorrect output clock frequnency in short period after CCLKEN bit
set and B(W)TR registers set.
2) Added reset of CCLEN bit in stop procedure.
2016-12-09 18:00:28 +03:00
Nicolas Reinecke
546ac1d584
STM32: fix USB HOST HS when cpu is in sleep mode
2016-12-05 11:47:32 +01:00
Peter
c7d33767e0
change qei types to int16_t
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
580af16b82
usbh: add otg stepping 2 code
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
de0c3e70c6
usbh: cleanup
2016-12-05 11:37:44 +01:00
Nicolas Reinecke
00f18c55cc
whitespace
2016-11-08 21:07:23 +01:00
Nicolas Reinecke
a6158cef3c
add STM32F7 FMC write FIFO disable bit
2016-11-08 21:07:23 +01:00
Kimmo Lindholm
37700daf23
STM32 CRC : Fix asserts
2016-11-05 20:45:10 +02:00
barthess
709addd02d
Updated include guards
2016-10-17 17:23:16 +03:00
barthess
80b50d3935
[STM32 NAND] Code cleanup.
2016-08-18 11:25:08 +03:00
barthess
e1601e0a7d
[STM32 NAND] Deleted ugly hack with EXTI interrupt instead of NAND one
2016-08-16 18:00:59 +03:00
barthess
eff62993d3
[STM32 NAND] Deleted unused defines.
2016-08-16 16:20:47 +03:00
barthess
c7afdebe33
Added room for STM32F7x
2016-07-14 13:18:21 +03:00
Stephane D'Alu
f75abd1037
added qeiAdjustI. added new field and checking in STM32
2016-07-07 21:25:51 +02:00
Nicolas Reinecke
4a36fb944b
qei driver: fix potential overflow in qeiUpdateI
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when quiUpdate isn't called for while an cnt(uint16_t) is above 32767
delta(int16_t) can overflow.
2016-05-15 20:21:20 +02:00
Nicolas Reinecke
040c8c9ad2
qei driver: change copyright
2016-05-15 20:21:20 +02:00
Nicolas Reinecke
6f67aa78c3
add STM32 qei (quadrature encoder interface) driver
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Code from tinito in forum thread:
http://forum.chibios.org/phpbb/viewtopic.php?f=14&t=685
Updated to chibios trunk.
2016-05-08 18:27:11 +02:00
Nicolas Reinecke
409a3f226d
FSMC: fix build on stm32f1x and stm32f3
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STM32F1,3 has no fsmc reset function so make it optional
2016-04-29 14:14:51 +02:00
barthess
9d74dd2661
STM32 mass update to current naming convention in ChibiOS
2016-04-07 16:39:12 +03:00
barthess
18b41efefa
NAND. Cosmetical improvement
2016-03-17 12:03:18 +03:00
barthess
04c11df0b2
Updated some testhal projects to new ChibiOS code
2016-03-15 10:19:56 +03:00
Fabien Poussin
499335cd61
TIMCAP: Initial commit
2016-02-16 00:51:22 +01:00
Fabien Poussin
771feb098d
USB-Host: Initial commit
2016-02-15 23:34:25 +01:00
barthess
c757be0c16
Fixed typo
2015-10-14 17:52:47 +03:00
barthess
a2f9bc469a
FSMC code cleanup
2015-10-14 17:46:40 +03:00
Michael Spradling
316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
barthess
e7a3df6c18
Improved FSMC.
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SRAM configuration is much more flexible now.
2015-08-04 13:30:01 +03:00
Andrea Zoppi
58f5fd1d72
Removed dependency on ST library for SDRAM
2015-06-28 22:53:44 +02:00
Andrea Zoppi
b872d9409c
Minor changes
2015-06-27 18:34:33 +02:00
Andrea Zoppi
ee1353a305
Old definitions removed
2015-06-27 18:32:58 +02:00
TexZK
542d79ef90
LTDC and DMA2D ported to ChibiOS/RT 3
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+ LTDC and DMA2D peripheral drivers
+ LTDC and DMA2D demo project
2015-06-24 21:24:45 +02:00
barthess
06640e31ce
EICU. Fixed incorrect frequency calculation.
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Timers 9, 10, 11 connected to APB2 but constant in driver
initialization code was taken for APB1.
2015-06-02 15:53:58 +03:00
barthess
82973c099e
Fixed copypaste error in comment
2015-06-02 11:15:04 +03:00
barthess
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
barthess
3d45d3d4fa
EICU. Updated lld according to chibios updates.
2015-03-31 16:43:14 +03:00
barthess
0feccaa469
EICU. Updated authors.
2015-03-13 23:53:00 +03:00
barthess
6398d0d351
EICU. Low level driver moved to TIMv1 directory
2015-03-13 23:26:24 +03:00
barthess
22819b0f46
EICU. Temporal code moved to main chibios repo.
2015-03-13 23:19:12 +03:00
barthess
6f9bf595fd
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib into HEAD
2015-03-13 22:48:38 +03:00
barthess
bff52a2141
EICU. Minor improvements
2015-03-13 22:48:25 +03:00
barthess
bfac876090
EICU. Added support of single channel timers.
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Tested in hardware with TIM11.
2015-03-13 12:07:48 +03:00
barthess
ceb3c861d5
EICU improvements.
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Added field containing available channels into EICU driver structure.
This simplified driver code.
2015-03-12 18:24:49 +03:00
barthess
070bcc130c
EICU. Added const qualifier for driver pointer in some functions
2015-03-05 16:03:05 +03:00
barthess
ae1ce0ea2b
EICU. Timer widht (16-32 bits) now stored in driver field and detected durign startup
2015-03-05 15:59:32 +03:00
barthess
e75668f53b
EICU. Cosmetical cleanup
2015-03-03 22:43:25 +03:00
barthess
35c48df910
EICU. Deleted code for "fast" capture.
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Reasons:
1) It duplicates functionality of "vanilla" ICU driver
2) Fast and slow modes are mutually exclided in single timer
2015-03-03 22:24:16 +03:00
barthess
28ab149cf7
EICU. Cosmetical improvements.
2015-03-03 21:07:44 +03:00