Commit Graph

26 Commits

Author SHA1 Message Date
Dominic Clifton a325e2386d STM32H730 - Initial ST32H730 support.
The H730 is a value-line CPU, similar to the H723/H725, but with only
128kb RAM.

The FC firmware code is designed to RUN from external flash in MEMORY
MAPPED mode, via OctoSPI.  Use of ITCM/DTCM advised for core loops, like
PID control.

A bootloader is required to enable memory-mapped mode and jump to the
firmware, similar to how EXST bootloader system works.

Config storage is not part of this commit and is a problem when using a
single flash chip in memory mapped mode because the CPU can't run
read/write routines from the flash chip while writing to the flash chip.
Until flash read/write routines are updated the solution requires either
a second flash chip on an SPI interface, or the use of an SD card for
config storage.

Additional commits will support read/write of config to the code/data
storage flash chip to enable cheap and space efficient single-flash-chip
FC solutions.

Squashed commits:
STM32H730 - Workaround issue with 2GB `.elf` files being created.
STM32H730 - Reduce firmware size to 1MB.
STM32H730 - Add USB HS configuration.
STM32H730 - Add ADC internal tag mappings.
STM32H730 - Update all ADC mappings based on the referenced ST
documentation.  Add the VBAT channels.
STM32H730 - Fix DMA continuous requests.
STM32H730 - Fix ADC_INTERNAL confusion.
STM32H730/G4 - Disambiguate use of ADC_CHANNEL_INTERNAL_FIRST_ID.
STM32H730 - Fix documentation reference.
STM32H730 - Add DMA request mapping for ADC3.
STM32H730 - Explicitly set the ADC clock.
STM32H730 - Configure PLL2 speeds correctly.

* Tested with Ultrafast 64GB SanDisk SDXC card.

STM32H730 - Use 50Mhz clock for SDXC cards.

* Tested with SanDisk Ultra 64GB.  100Mhz clock gave CRC errors.

STM32H730 - Ensure USB has a lower NVIC priority than the SDMMC card
reads.

If it's higher, 0, then the SDMMC's DMA IRQ handler doesn't get called
when handing USB MSC storage reads.

STM32H730 - Support CPU name in CLI.

STM32H730 - Rebuild when linker scripts changes.
2021-12-23 15:02:23 +01:00
mikeller 03d3d94497 Added Unified Target for STM32G4. 2021-04-26 16:18:28 +12:00
jflyper 1feb306674 [H7] H723/H725 support 2020-11-11 23:45:15 +09:00
jflyper 697d0f7ed3 [H7] H7A3 support 2020-11-01 00:32:39 +09:00
jflyper e4d7c4e152 [G4][SYSTEM] Basic & build files 2020-09-30 18:20:05 +09:00
Dominic Clifton 0632eeb934 Support compilation of EXST (EXTERNAL STORAGE) targets
- Initial

- Adjust load address of EXST firmware.

- Add helper script to pad an EXST binary to the expected size.

Padded firmware currently required due to a bug in the flash/dfu code
which causes anything less than a flash page size to be truncated when
uploading new firmware via the bootloader DFU.

- Minor linker script cleanups.

- STM32H7.mk change hardcoded TARGET_FLASH (384) to FIRMWARE_SIZE

- Delete unused configuration section entries from linker
scripts.

- Increase EXST firmware size to 448K.
It turns out 384K wasn't enough for a feature-complete firmware.

- Update pad-exst.sh to use 448K by default.

- Move the EXST file generation to the makefile.

[EXST] Embed firmware hash in ELF

- Add debug marker at end of CODE_RAM section.

It was found when transferring firmware to the H7 RAM via a BMP probe
using the 'gdb load' command, that the last few bytes were not
transferred, this debug marker is present to ensure all needed parts of
the firmware are present.

Example memory view of corrupted bytes at end of transfer:
0x2407DFAE  DEB90000 DEB9DEB9 DEB9DEB9 DEB9DEB9  ..¹Þ¹Þ¹Þ¹Þ¹Þ¹Þ¹Þ
0x2407DFBE  000000B9 00000000 00000000 00000000  ¹...............

should be:
0x2407DFAE  DEB9DEB9 DEB9DEB9 DEB9DEB9 DEB9DEB9  ¹Þ¹Þ¹Þ¹Þ¹Þ¹Þ¹Þ¹Þ
0x2407DFBE  00000000 00000000 00000000 00000000  ................

- Remove debug marker in EXST firmware.

STM32H750_EXST - Provide space for empty hash.

* Bootloader will run firmware if hash is empty, without re-verifying
RAM content against hash.
* CODE_RAM always shows as 100% usage.

STM32H750_EXST - Use a specific ELF section for a hash.

Two benefits:
1) CODE_RAM no-longer shows 100% full, since it is no-longer
padded/filled.
2) Prepares the code so that objcopy can be used to inject the hash
into the ELF.

STM32H750_EXST - Patch MD5 into ELF.

Process is now as follows.

* Binary generated (via make target dependency) so there is something to
hash.
* Binary copied (and padded).
* MD5 Hash computed.
* xxd patch file generated from hash.
* xxd hash patch applied to copy of binary at correct address.
* elf .exst_hash section dumped.
* hash injected into into dumped section.
* elf .exst_hash section updated with updated dumped section.

Replace EXST with USE_EXST.

Add documentation for the EXST firmware format.

Add table formatting to EXST documentation.

Update bootloader block.

Update H750 EXST linker script to use block format 0x00.

Use .exst.elf and .exst.bin on the exst files.

Add 'no checksum' to list of checksum hash methods.

Update EXST build system so it generates the following sets of files

obj/main/betaflight_TARGET.elf
obj/main/betaflight_TARGET.map
obj/main/betaflight_TARGET_EXST.elf
obj/betaflight_VERSION_TARGET.bin
obj/betaflight_VERSION_TARGET.bin.md5
obj/betaflight_VERSION_TARGET_EXST.bin

Update EXST build system to be more user-friendly.

* user-flashable files are generated in the normal place.
* Intermediate files are generated in `obj/main/...`
* Removes the `exst` goal.
* Adds .hex generation for EXST builds based on the patched .elf.

To build EXST targets, simply use `make TARGET=x` as normal and flash
the resulting `.hex/.bin` files rather than the .exst.bin file.

Developers can use either the `.elf` or patched `_EXST.elf` file as is
appropriate for their needs.

EXST documentation updated to match changes to build system.
2019-06-07 09:14:49 +12:00
jflyper dacb709e38 [H7] System and build files
Basic system files

- Initial system files

- Additional RCC clock enables for testing

- Coding style tidy (target/system_stm32h7xx.c) and enable MCO for testing

- Clock generator changes for SPI support

- Setup MPU for "D2 SRAM as write-through by MPU, call it DMA_RAM"

- Drop USB clock enabling from driver/system_stm32h7xx.c

- stm32h7_hal_conf.h for persistent object storage

Basic build files

STM32H7.mk changes

- STM32H7.mk for USE_UART and USE_SERIAL_RX

- Modify STM32H7.mk for inclusion of SPI driver

- STM32H7.mk change for D2 SRAM as write-through by MPU, call it DMA_RAM

- STM32H7.mk for DMA facility

- STM32H7.mk for [TIMER] For "Initial cut without Dshot"

- STM32H7.mk change for [LED_STRIP] Add LED_STRIP

- STM32H7.mk for [ADC] Initial cut without internal sensors

- STM32H7.mk for Enable I2C (HAL)

- STM32H7.mk for "Enable HAL-based DShot (no burst yet)"

- STM32H7.mk change for transponder

- STM32H750 - Add platform support.

- STM32H750 - Add H750 MCU ID.

- STM32H743 - Add MCU ID.

STM32H7.mk change for "Burst Dshot First working version"

Fix boot loader request

STM32H750 - Add PERSISTENT memory support.

STM32H743 - Add PERSISTENT memory support.

Use PERSISTENT memory for bootloader request.

Using DTCM RAM did not work on H750.

Change flash latency from 4WS to 2WS

STM32H750 - Fix reset of RCC_CR to reset value.

Note: The comment above the code didn't match code.

STM32H750 - Remove duplicate startup code, see SystemClock_Config.

STM32H7.mk changes for Port RTC backup register based persistent storage for H7

Make use of persistent object facility

Force reboot after possible boot loader activity

Enable CRS

stm32h7xx_hal_conf.h for H7 - QuadSPI support

stm32h7xx_hal_conf.h for STM32H7 - SDCard/SDIO using HAL Driver

stm32h7xx_hal_conf.h : Fix systick to be 0x00 instead of ST's default 0x0F.
This fixes the ability to use HAL_Delay() from an ISR, as required by
the ST's USB Library.
Specifically, systick handler must be a higher priority than the USB
FS/HS Interrupt handler priorities.

stm32h7xx_hal_conf.h for Add PID-Audio support

source.mk for H7 - QuadSPI support

drivers/system_stm32h7xx.c for H7 - QuadSPI support

STM32H7.mk for H7 - QuadSPI support

STM32H7.mk change for CDC-HID support

common_pre.h updates

- Scheduler parameters to same as F4 & F7

- Enable some important default features

- STM32H7 - Enable ITCM RAM.
Requires voltage scaling fix from commit
6e684c609310024141c43de484a5e78103140e3c

STM32H750 - Disable caches before reboot.

Prior to this when EEPROM_IN_RAM was used the persistent data section
would have corruption immediately after a reboot, prior to even the
Reset_Handler code having been executed.

drivers/system_stm32h7xx.c Touch-up after 2019-02-02 rebase

STM32H7 - Write protect ITCM ram.

Remove local defs for RESET_xxx symbols

STM32H750 - EXST firmware reboots to FLASH bootloader, rather than ROM bootloader.

STM32H750 - Disable some MCO/clock testing code as the pins interfere with new targets.

STM32H750 - Don't disable data caches after bootloader.

Observed that disabling dcache after cold boot with BOOT pin high causes
segfault.

drivers/system_stm32h7xx.c for STM32H7 - SDCard/SDIO using HAL Driver

drivers/system_stm32h7xx.c change for Move SDMMC clock init into SDIO driver

drivers/system_stm32h7xx.c: Cleanup some Clock/MCO/GPIO initialisation code.

drivers/system_stm32h7xx.c for Reset if systick is stuck.

STM32H7 - Fix missing CPU voltage scaling.

It appears this was the cause of other seemingly random issues:

* Crash soon after enabling USB.
* Flash write failures.
* Random un-explainable crashes.

Change RCC_HSE_BYPASS to RCC_HSE_ON

Even Nucleo-H743 seems to work without setting HSE_BYPASS.

STM32H7xx - Move memory section initialisation earlier into the init sequence.

Allows startup-code/libs/etc to be moved into different memory regions.

Don't touch vector table in EXST targets

STM32H750_EXST - fix boot loop

target/system_stm32h7xx.c for STM32H7 - SDCard/SDIO using HAL Driver

target/system_stm32h7xx.c change for Fix SD card clock speed selection

STM32H750_EXST - Reset MPU regions on boot.

* Failure to reset regions will result in mem-fault if bootloader has
configured a similar region.

STM32H750 - Fix missing include of platform.h in system_stm32h7xx.c

This caused the SDMMC peripheral clock to be un-configured (at reset
state) when USE_SDCARD_SDIO was defined.

Change MPU region number for DMA_RAM from 0 to 1

Avoid conflict with ITCM-RAM write protection.

STM32H7xx - HSERDY slow/stuck workarounds.

STM32H7xx - Fix region MPU number for SDIO.

* It was overwriting the previous region causing LED strip and
transponder issues.

Target/system_stmh7xx.c for Reset if systick is stuck.

startup/system_stm32h7xx.c change for non-caching DMA_RAM

H750 - Use SIZE optimization by default due to limited flash space.

STM32H7.mk for STM32H7 - SDCard/SDIO using HAL Driver

STM32H7.mk updates

- Decrease HSE_STARTUP_TIMEOUT to 1 second
* default is 5 seconds, which is too long when HSE gets stuck.

- Add PID-Audio support

Temporary override LINKER_DIR
2019-05-21 02:26:31 +09:00
Andrej Podzimek 17b66067bb Adding a reusable mapping function between alt and base targets. 2018-09-11 06:06:50 +02:00
Michael Keller 283e55e45d Removed SPRACINGF3OSD support. 2018-08-08 08:32:20 +12:00
Andrey Mironov 5542578d98 Added KISSFCV2F7 back to supported targets 2018-07-23 23:41:41 +03:00
mikeller 3663fcb285 Removed KISSFCV2F7 from build because of ITCM_RAM overflow. 2018-07-22 11:49:43 +12:00
Anders Hoglund 0185018973 Build target groups populated dynamically. 2018-07-16 18:10:03 +02:00
mikeller 935d61694d Re-enabled building of KISSFCV2F7. 2018-06-09 11:11:46 +12:00
mikeller 7a03ead75e Made SIMULATOR_BUILD a makefile driven option. 2018-05-14 19:13:37 +12:00
jflyper 35df29f0bc Use nomk to signify no build target name 2018-05-05 01:13:12 +09:00
jflyper 77cbeab783 Exclude KISSFCV2F7 from CI 2018-05-03 09:42:10 +09:00
jflyper ac13e87c86 OmniNXT F4/F7 support 2018-04-27 09:42:21 +09:00
Dominic Clifton cde9a9517b SPRacingF7DUAL - Dual SIMULTANEOUS gyro support. (#5264)
* CF/BF - Set STM32F7 SPI FAST clock to 13.5Mhz - Gyros not stable at
27mhz.

* CF/BF - Initial SPRacingF7DUAL commit.

Support two simultaneous gyro support (code by Dominic Clifton and Martin Budden)
There are new debug modes so you can see the difference between each gyro.

Notes:
* spi bus instance caching broke spi mpu detection because the detection
tries I2C first which overwrites the selected bus instance when using
dual gyro.
* ALL other dual-gyro boards have one sensor per bus.  SPRacingF7DUAL is has two per bus and thus commit has a lot of changes to fix SPI/BUS/GYRO initialisation issues.

* CF/BF - Add SPRacingF4EVODG target.

This target adds a second gyro to the board using the SPI pads on the back of the board.

* CF/BF - Temporarily disable Gyro EXTI pin to allow NEO target to build.
2018-03-04 11:29:31 +13:00
rotcehdnih 89f8a377c9 ADD FPVM_BETAFLIGHTF7 Target 2018-03-01 19:49:35 +11:00
Anders Hoglund 24a282a9a3 Added .mk as files with LF line ending. Converted a few files in the make dir. 2017-11-05 20:41:17 +01:00
mikeller 24acffb472 Rebalanced target groups for more even build times. 2017-11-05 12:49:01 +13:00
Michael Keller 5ae3933db4 Changed make target for 'all' to not include unsupported, added 'all_with_unsupported' (formerly 'all') and 'unsupported' targets. 2017-10-18 09:56:44 +13:00
Michael Keller e6fdd266e0 Removed F1 targets from the target lists used for CI, added warning about deprecation. 2017-10-17 11:34:09 +13:00
Moto Moto 2940634268 Add MOTOLABF4 to SKIP_TARGETS 2017-08-09 23:45:28 -05:00
Moto Moto 3803992086 Add MOTOLABF4 targets MLTEMPF4 and MLTYPHF4 2017-08-07 22:10:48 -05:00
blckmn 61cfb0aedf Some separation in the Makefile 2017-07-21 07:51:13 +10:00