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340 Commits

Author SHA1 Message Date
Benjamin Vedder 39bb8a6b09 FW 3.53: Limit foc_current_filter_const range, 1Mbit/de NRF speed, lower detect f_sw for resistance, no temp_comp by default 2019-03-20 22:46:36 +01:00
Benjamin Vedder 3bf1c13b76 Added missing firmwares 2019-03-10 15:22:27 +01:00
Benjamin Vedder 0bf3cc65ed Fixed codacy warnings 2019-03-10 15:19:05 +01:00
Benjamin Vedder 65298263b6 75/300 R2 support, terminal sync cmd, IMU support, option to disable permanent UART, collected timer functions in one place 2019-03-10 14:57:42 +01:00
Benjamin Vedder 0db2f200f6 Updated some comments in commands to make it easier to follow 2019-03-05 07:33:31 +01:00
Benjamin Vedder 9cbddf4066 Increased AS5047 error rate threshold 2019-03-04 20:05:20 +01:00
Benjamin Vedder aa13c3b345 Fixed build with servo out enabled, added prebuild firmwares 2019-03-04 19:29:05 +01:00
Benjamin Vedder 35c1c72ab4 Commands restructuring for thread safety, 75/300 vreg fix, fixed relative current commands 2019-03-04 19:23:38 +01:00
Benjamin Vedder 01e72eb555 Autogenerated config parsing with signatures, fixed previous PRs 2019-03-01 21:36:58 +01:00
Benjamin Vedder a8b3f9d3e1 Merge branch 'master' of https://github.com/vedderb/bldc 2019-03-01 17:18:43 +01:00
Benjamin Vedder 2584774d4a
Merge pull request #72 from Flytrex/encoder-check-PR 
AS5047 encoder parity check
 2019-03-01 17:18:33 +01:00
Benjamin Vedder f9ce429447 Ramping updates 2019-03-01 17:18:07 +01:00
vadim e70be9e17a filter out zero encoder reading - can be caused by gnd short 2019-03-01 11:45:34 +02:00
vadim 8cc3ea519a update the help text for the terminal with the new encoder command 2019-03-01 11:00:32 +02:00
vadim 611ad1e1d1 reset the erro rate in encoder deinint as well 2019-02-28 19:31:27 +02:00
vadim 9488eb9008 moved encoder fault triggering to timer thread, added FOC mode check 2019-02-28 18:58:17 +02:00
vadim c7515fbda5 reset error rate when initializing encoder 2019-02-28 11:08:09 +02:00
vadim f668b89db5 trigger a fault when AS5047 encoder SPI communication is broken 2019-02-25 14:43:02 +02:00
vadim 5b09d687b8 debug function for encoder CRC 2019-02-25 14:37:54 +02:00
vadim 46d9361886 reject encoder readings with bad CRC 2019-02-25 14:34:17 +02:00
Benjamin Vedder cf949d00c0
Update README.md 2019-02-20 09:46:50 +01:00
Benjamin Vedder a70fad1861 Updated Travis CI badge 2019-02-19 23:14:54 +01:00
Benjamin Vedder 5e4d35a854 Fix issue 47 2019-02-19 22:18:30 +01:00
Benjamin Vedder 18b79a3a09 Fixed some issues found by codacy 2019-02-19 22:06:34 +01:00
Benjamin Vedder d50b4b5fc3 Updated codacy badge 2019-02-19 21:35:03 +01:00
Benjamin Vedder c76942009b Some fixes after the merge 2019-02-19 18:55:18 +01:00
Benjamin Vedder a546cc4dd5
Merge pull request #71 from paltatech/powerdesigns-dev 
Powerdesigns dev
 2019-02-19 17:57:59 +01:00
Marcos Chaparro 723abcb09f Remove ST DAC library and use the DAC by direct register access 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 11:40:49 -03:00
Marcos Chaparro 761c490fdd Calculate deadtime for gpdrive.c 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 11:01:28 -03:00
Marcos Chaparro 93ebffa2ee Avoid watchdog resets if CAN is not used 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 10:59:38 -03:00
Marcos Chaparro b344e873b6 Remove duplicated flux linkage detection function 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 10:55:40 -03:00
Marcos Chaparro 32cf05629d Resolve merge conficts with major 2019 release 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-18 20:25:52 -03:00
Benjamin Vedder 123bb00ab4 Major 2019 update 2019-02-18 19:30:19 +01:00
Marcos Chaparro fe0984c5d1 Add HW_VERSION_PALTA to CI build 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-02 12:12:47 -03:00
Marcos Chaparro 80c34d17f6 Add conf_general_calculate_deadtime declaration 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-01 07:03:37 -03:00
Marcos Chaparro c86d8c3dc3 Increase traveis build coverage to most hardware versions 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-31 20:59:10 -03:00
Marcos Chaparro 4ac69232d9 Configure deadtime by just defining it in nanoseconds. Firmware will calculate the required DTG register value. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-31 00:51:35 -03:00
Marcos Chaparro 9652231edb Allow to run PWM at frequencies multiples FOC loop to support applications with PWM running at 100+kHz. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-30 00:33:56 -03:00
Marcos Chaparro fa9ed8dc55 Clearerr way to limit FOC loop frequency. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-29 16:05:47 -03:00
Marcos Chaparro c59dd2b2fc Fix shadowed variables. Add -Wshadow. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 16:52:02 -03:00
Marcos Chaparro 884f626e63 Restore capability of enabling parameter assertion of peripheral libraries 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 16:47:10 -03:00
Marcos Chaparro 43dbe80de5 Fix DAC init assertion 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 02:21:47 -03:00
Marcos Chaparro 6010fceb24 More README information and badges 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-27 01:20:13 -03:00
Marcos Chaparro 6ca38bccbb Add Codacity code quality badge. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-26 19:26:43 -03:00
Marcos Chaparro 69bdc73536 Put a safe limit on ADC ISR frequency to avoid kernel panics. Currently ADC ISR duration is around 26usec, it can not be executed at more than 38kHz 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-26 02:36:12 -03:00
Marcos Chaparro 4178785c89 Update README.md with Travis badge 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-25 20:07:33 -03:00
Marcos Chaparro e21bd56493 Add Travis CI config file 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-25 19:39:59 -03:00
Marcos Chaparro e02324a802 Shifting signed 32-bit value by 31 bits is undefined behaviour 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-25 00:09:08 -03:00
Marcos Chaparro 12fcffb629 Window Watchdog feed moved outside ADC ISR. Now it has the same coverage as the IWDG, with the extra capability of detecting that the timeout thread is running faster than expected. 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-24 13:16:28 -03:00
Marcos Chaparro 17f97763c0 Extend watchdog coverage with IWDG, a watchdog running from an independent LF oscillator. If any of the threads being monitored does not report for more than 12ms, a reset will be asserted. When a WDG reset happens, the user can see it in the fault logs from vesc tool 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-24 12:19:44 -03:00