74065b233a
Fixed rest of paths in build scripts.
2015-08-24 16:26:22 +03:00
1baa777a7e
Merge pull request #23 from fpoussin/master
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Makefile paths rework
2015-08-24 15:19:16 +03:00
69d3493ce6
Add I2C support for nRF51
2015-08-20 22:45:21 -04:00
e3d9163628
Merge pull request #16 from doceme/nrf51-cleanup-serial
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Cleanup nRF51 serial driver
2015-08-20 17:20:24 -03:00
48a03708ff
Changed the way files are included to a more convenient way.
2015-08-20 17:47:21 +02:00
fb8c390f06
Update code from code feedback
2015-08-16 23:51:41 -04:00
316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
e2da880b5f
Cleanup nRF51 serial driver
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Use values from bitfields header. Also convert notify1 function to be
non-blocking, which seems to be how most of the other serial drivers are
implemented.
2015-08-10 22:44:44 -04:00
2ca7c90917
Add EXT driver for nRF51
2015-08-09 17:18:46 -04:00
f98110c6f4
Merge pull request #19 from doceme/nrf51-spi
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Add SPI support for nRF51
2015-08-06 10:47:23 -03:00
e7a3df6c18
Improved FSMC.
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SRAM configuration is much more flexible now.
2015-08-04 13:30:01 +03:00
94096f9972
Merge branch 'tiva_i2c_fix'
2015-07-29 16:54:22 +02:00
6202fcbb8b
Add SPI support for nRF51
2015-07-27 22:42:45 -04:00
eab925c492
Merge pull request #18 from doceme/nrf51-board
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Update nRF51 Waveshare board file
2015-07-27 19:43:10 -03:00
3c49bf228b
Update nRF51 Waveshare board file
2015-07-26 23:08:44 -04:00
91d82fc631
nRF51: Remove unnecessary direction setting
2015-07-26 22:54:46 -04:00
f91f5a5c57
Cleanup nRF51 PAL driver
2015-07-25 22:16:19 -04:00
e82536b815
Add nRF51 bitfield header file
2015-07-23 23:41:06 -04:00
58f5fd1d72
Removed dependency on ST library for SDRAM
2015-06-28 22:53:44 +02:00
b872d9409c
Minor changes
2015-06-27 18:34:33 +02:00
0229440fba
ILI9341 driver moved to devices_lib
2015-06-27 18:34:23 +02:00
ee1353a305
Old definitions removed
2015-06-27 18:32:58 +02:00
542d79ef90
LTDC and DMA2D ported to ChibiOS/RT 3
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+ LTDC and DMA2D peripheral drivers
+ LTDC and DMA2D demo project
2015-06-24 21:24:45 +02:00
fce100680e
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2015-06-02 19:55:16 +03:00
06640e31ce
EICU. Fixed incorrect frequency calculation.
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Timers 9, 10, 11 connected to APB2 but constant in driver
initialization code was taken for APB1.
2015-06-02 15:53:58 +03:00
82973c099e
Fixed copypaste error in comment
2015-06-02 11:15:04 +03:00
343042d9d2
Add tx/rx pin configuration to SerialConfig
2015-05-15 21:08:53 -03:00
69d70de9b7
Add PAL configuration
2015-05-15 21:04:52 -03:00
57f582abae
Add some GPIO pin definitions
2015-05-15 20:45:02 -03:00
621e7198d7
Remove GPIO pin initialization
2015-05-15 20:44:37 -03:00
4ac0b638b9
Add basic PAL driver
2015-05-15 20:44:03 -03:00
aa43fd6554
Use sleep/wakeup for serial driver top-half
2015-05-14 23:07:10 -03:00
776fc29107
Fix some issues with serial driver
2015-05-14 22:12:57 -03:00
c37554ca20
Add initial serial driver
2015-05-13 22:19:05 -03:00
825c8ea30b
Add TIMER0 based ticker for OS
2015-05-13 20:30:12 -03:00
f0bcca7b46
Don't hang boot
2015-05-13 20:29:45 -03:00
c1427ae07d
Add basic board support
2015-05-12 22:08:57 -03:00
5afd99de17
Add basic HAL/ST drivers
2015-05-12 22:06:39 -03:00
9b1feee2e7
Remove PAL, add ST
2015-05-12 22:05:23 -03:00
a0110bc179
Merge master
2015-05-10 17:51:59 -03:00
e4c2e8adf8
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2015-05-08 00:04:15 +03:00
f5b812a2e7
NAND. Minor improvements
2015-05-08 00:04:09 +03:00
67ccbf4da0
Updated board.h file
2015-05-07 18:44:26 +03:00
dd7d31d083
Fixed copyright notes
2015-05-02 23:00:00 +03:00
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
e07ebbcac3
Add initial system header + makefile
2015-04-29 19:48:06 -03:00
ca60a9cba2
Tiva. I2C. Fixed bug where number of bytes read is 2 more then requested. This only occurs when the number of bytes to read is 3 or more.
2015-04-24 22:00:47 +02:00
e5f1b8b034
Tiva. ST. Moved ST interrupt priority check from hal_lld to st_lld.
2015-04-16 22:15:15 +02:00
5130840d32
Tiva. MAC. Added check for valid interrupt priority.
2015-04-16 22:03:13 +02:00
cd95bc80f0
Tiva. EXT. Added checks for valid interrupt priorities.
2015-04-16 21:56:32 +02:00
7b7c6fd198
Tiva. Replaced all references to CORTEX_IS_VALID_KERNEL_PRIORITY with OSAL_IRQ_IS_VALID_PRIORITY.
2015-04-16 21:46:53 +02:00
2c0b573553
Merge branch 'tiva_ext_driver'
2015-04-14 23:07:24 +02:00
a8358f2140
Tiva. EXT. Changed name of ext_serve_port_interrupt and ext_serve_pin_interrupt.
2015-04-14 23:00:29 +02:00
2c66f54771
Tiva. EXT. Fixed typo in ext_serve_pin_interrupt macro.
2015-04-14 22:53:48 +02:00
f4e68ad23a
Tiva. EXT. Wrapped ext_serve_port_interrupt and ext_serve_pin_interrupt in a do{}while(0)
2015-04-14 22:52:22 +02:00
1afe28e9be
Tiva. EXT. Added ext_lld files and added ext_lld.c to platform.mk
2015-04-14 22:43:42 +02:00
c6474b882a
Tiva. EXT. Added number of GPIO pins to the registry.
2015-04-14 22:40:24 +02:00
3d45d3d4fa
EICU. Updated lld according to chibios updates.
2015-03-31 16:43:14 +03:00
91d9d09673
Removing GPTM_TAMR_TASNAPS was a bad idea. This caused the TAR register to not update at match so an incorrect value was read in st_lld_get_counter.
2015-03-23 21:08:57 +01:00
560076be34
Removed ST_CLOCK_SRC for Tiva st_lld and replaced with TIVA_SYSCLK.
2015-03-23 20:55:52 +01:00
927cbb1bee
Tiva tickless mode is working for 16 bit timers too. Typecasting was not correct before.
2015-03-22 22:46:09 +01:00
2d6792780a
Added macros in st_lld for Tiva defices to wait until a timer is ready before using it.
2015-03-22 22:40:22 +01:00
61f2081d66
Fixed incorrect Tiva ST_HANDLER and ST_NUMBER defines in st_lld.
2015-03-22 22:27:51 +01:00
bc7117e04c
Wait until the timer peripheral is ready to continue. When built with -O0 this was not needed, but with -O2 the peripheral was not ready when it was accessed.
2015-03-20 21:38:01 +01:00
273b1fa525
Fixed using incorrect registers.
2015-03-20 21:36:52 +01:00
b3c2194d95
Tiva st_lld files cleanup.
2015-03-20 21:11:57 +01:00
94ae99ab51
Tiva Tickless timer in down mode turned out not to work in last commit. It's working for WGPT5 now.
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Started some cleanup in st_lld driver.
2015-03-20 21:04:38 +01:00
87e99fedd8
Changed the Tiva tickless timer implementation to use the timer in down mode. It's working for WGPT5 now.
2015-03-20 20:21:38 +01:00
930d2d6de0
Tickless mode for Tiva seems to be working using WGPT5 in up mode.
2015-03-20 19:49:21 +01:00
799f3b5d8a
Merge branch 'tiva_spi_dma'
2015-03-17 21:58:57 +01:00
7a68c44dd0
Added Tiva UDMA initialization in hal_lld of TM4C123x devices.
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Added UDMA and SPI driver to platform.mk of TM4C123x devices.
2015-03-17 21:49:01 +01:00
c38910ced9
Added Tiva SPI low level driver.
2015-03-17 21:47:56 +01:00
a1899308aa
Added Tiva UDMA driver.
2015-03-17 21:47:12 +01:00
6c105d29d2
Changed Tiva UDMA peripheral structure for TM4C123x.
2015-03-17 21:44:45 +01:00
e941fc7f5b
Added Tiva UDMA ISR names and numbers to TM4C123x tiva_isr.h
2015-03-17 21:43:40 +01:00
04d4618419
Renamed Tiva GPIOA SSI pins to their function (RX, TX and CLK) in TI_TM4C123G_LAUNCHPAD board.h.
2015-03-17 21:42:17 +01:00
0feccaa469
EICU. Updated authors.
2015-03-13 23:53:00 +03:00
6398d0d351
EICU. Low level driver moved to TIMv1 directory
2015-03-13 23:26:24 +03:00
22819b0f46
EICU. Temporal code moved to main chibios repo.
2015-03-13 23:19:12 +03:00
6f9bf595fd
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib into HEAD
2015-03-13 22:48:38 +03:00
bff52a2141
EICU. Minor improvements
2015-03-13 22:48:25 +03:00
bfac876090
EICU. Added support of single channel timers.
...
Tested in hardware with TIM11.
2015-03-13 12:07:48 +03:00
ceb3c861d5
EICU improvements.
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Added field containing available channels into EICU driver structure.
This simplified driver code.
2015-03-12 18:24:49 +03:00
070bcc130c
EICU. Added const qualifier for driver pointer in some functions
2015-03-05 16:03:05 +03:00
6518ddaf22
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2015-03-05 16:00:24 +03:00
ae1ce0ea2b
EICU. Timer widht (16-32 bits) now stored in driver field and detected durign startup
2015-03-05 15:59:32 +03:00
817efe19e0
Merge branch 'tiva_pal_driver'
2015-03-04 21:57:47 +01:00
ff68a0b1f0
Changed the Tiva board.h files so all pins are configured as GPIOs and tri-stated except the JTAG pins.
2015-03-03 23:05:02 +01:00
61b7a9f0f3
Added missing PAL_TIVA_DEN_ENABLE for PAL_MODE_INPUT in Tiva devices.
2015-03-03 23:02:56 +01:00
0f7928dd85
Added missing drive strength enable for PAL_MODE_OUTPUT_OPENDRAIN in Tiva devices.
2015-03-03 22:02:56 +01:00
4cd44e345e
Implemented PAL_MODE_* defines for Tiva devices.
2015-03-03 21:53:33 +01:00
555d45f70a
Implemented AHB access for GPIOA - GPIOJ for TM4C123x devices. On TM4C129x devices the AHB is the only used bus for GPIO.
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Replaced the nops after starting the gpio peripheral clocks with a busy wait until all GPIO peripherals are ready.
Added Sub-Family identifier for TM4C123x devices.
2015-03-03 21:15:21 +01:00
e75668f53b
EICU. Cosmetical cleanup
2015-03-03 22:43:25 +03:00
35c48df910
EICU. Deleted code for "fast" capture.
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Reasons:
1) It duplicates functionality of "vanilla" ICU driver
2) Fast and slow modes are mutually exclided in single timer
2015-03-03 22:24:16 +03:00
8b2ddb7f2b
EICU. Cosmetical improvements.
2015-03-03 21:10:03 +03:00
28ab149cf7
EICU. Cosmetical improvements.
2015-03-03 21:07:44 +03:00
75688209c2
EICU now able to capture data on all channels
2015-03-03 19:01:28 +03:00
4764c3ba15
EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still untested.
2015-03-01 21:09:12 +03:00
8bb246b572
EICU. Fixed another portion of typos.
2015-03-01 16:25:09 +03:00
71bba80a03
EICU. Fixed some typos.
2015-03-01 14:38:24 +03:00
4e7a5796b4
Added EICU driver in HAL. Added STM32 backend for EICU.
2015-02-28 21:42:40 +03:00
12d6c494d3
Restructured Tiva pal_lld.h
2015-02-26 22:45:32 +01:00
631ec2d5cb
Added missing static keyword for Tiva gpio_init function.
2015-02-26 21:38:20 +01:00
71f9a8ff50
Fixed incorrect and missing GPIO pin unlocking for JTAG and NMI pins in pal_lld_init.
2015-02-26 21:35:46 +01:00
f376aec4d8
Changed the Tiva pal driver RCGCGPIO enable mask name.
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Added a note about the RCGC register.
2015-02-26 21:11:51 +01:00
8a7ede5e0a
Fixed wrong bit mask in Tiva pal driver.
2015-02-26 21:09:10 +01:00
c17c2f6edf
Added Tiva I/O mode flags.
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Implemented _pal_lld_setgroupmode.
2015-02-26 20:31:47 +01:00
900963482d
Finished memtest code
2015-02-24 17:43:53 +03:00
2463abdd1b
Renamed Tiva launch and debug configurations.
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Fixed wrong SYSCTL access of gpt, i2c and pwm after changing the SYSCTL structure in TM4C123x.h.
2015-02-17 21:25:12 +01:00
7b73ccd1d0
Added basic demo for TM4C1294 Connected Launchpad with LwIP.
2015-02-16 21:49:29 +01:00
59499bd0cf
Added MAC low level driver for the TM4C129x. Tested on the TM4C1294 Connected Launchpad.
2015-02-16 21:31:04 +01:00
e391b1509d
Reverted TM4C129x SYSCTL to old structure.
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Added Ethernet peripheral structure for TM4C129x devices.
2015-02-16 20:49:37 +01:00
0c93d40779
[1-wire] Cosmetical cleanups
2014-12-27 22:18:30 +03:00
82b8855e83
Added board files for ST_STM32F0308_DISCOVERY board
2014-12-27 22:18:30 +03:00
073d4d467f
1-wire. STM32F1xx code tested
2014-12-18 00:21:28 +03:00
99505cdea6
1-wire. Added workaround form F1xx MCUs
2014-12-14 14:14:45 +03:00
97be1351af
1-wire. Fixed incorrect debug check
2014-12-14 14:13:11 +03:00
911e7ef827
Onewire. Deleted unneded time measurement unig
2014-12-08 20:40:00 +03:00
96bf25d2de
1-wire. Search ROM feature now optional
2014-12-06 21:29:08 +03:00
61263b2e91
1-wire. Improved comments
2014-12-06 21:10:14 +03:00
12da9781a0
Added onewire driver
2014-12-06 20:16:37 +03:00
4ab64b4e4e
Fixed copyrights
2014-12-06 20:15:59 +03:00
809e59f6c3
Added hooks for community source
2014-11-16 13:51:14 +03:00
ed62d9e4d4
FSMC. SDRAM. Fixed bug with registers' memory layout
2014-10-31 03:28:04 +03:00
1f97428d5d
FSMC. SDRAM. Fixed some typos
2014-10-31 02:51:00 +03:00
1c50a03cfd
FSMC. SDRAM. Added safety mask for SDRTR register
2014-10-25 15:54:24 +03:00
e874067224
FSMC. SDRAM. Fixed delay code
2014-10-25 15:46:31 +03:00
3af04b9ee5
FSMC. SDRAM. Improved stop function
2014-10-25 15:39:21 +03:00
b47ddce74d
FSMC. SDRAM driver cleanup. Needs review.
2014-10-25 15:26:29 +03:00
e9f9ddaa12
FSMC. SDRAM architecture reworked. Needs review.
2014-10-24 21:46:17 +03:00
5f231b6aaf
FSMC. SDRAM. Style cleanup
2014-10-22 10:33:02 +03:00
8dabb3b8f5
Added SDRAM support via FSMC
2014-10-19 23:58:48 +03:00
721c48bc97
FSMC. Build fixed after code moving from SVN
2014-10-18 17:20:29 +03:00
7355cbd461
Added fsmc code
2014-10-18 16:34:12 +03:00
0214eb9bcc
Changed some peripheral register structures in tm4c123x.h and tm4c129x.h to reduce the amount of duplicated text.
...
Updated gpt_lld, i2c_lld, pal_lld, pwm_lld, serial_lld, hal_lld register access to the changed peripheral register structures.
Replaced old interrupt numbers from tm4c123x.h and tm4c129x.h in serial_lld.c with the new interrupt number defines from tiva_isr.h.
2014-10-16 20:59:31 +02:00
6d5f529f28
Fixed missing peripheral declarations in tm4c123x.h and tm4c129x.h
2014-10-14 22:02:27 +02:00
b74008c849
Added Tiva HAL files.
2014-10-13 23:01:10 +02:00
ed9baddee3
Added Tiva board files.
2014-10-13 22:58:53 +02:00
barthess
Stephen Caudle
Fabio Utzig
Fabien Poussin
Michael Spradling
marcoveeneman
Andrea Zoppi