Benjamin Vedder
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a70fad1861
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Updated Travis CI badge
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2019-02-19 23:14:54 +01:00 |
Benjamin Vedder
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5e4d35a854
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Fix issue 47
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2019-02-19 22:18:30 +01:00 |
Benjamin Vedder
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18b79a3a09
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Fixed some issues found by codacy
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2019-02-19 22:06:34 +01:00 |
Benjamin Vedder
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d50b4b5fc3
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Updated codacy badge
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2019-02-19 21:35:03 +01:00 |
Benjamin Vedder
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c76942009b
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Some fixes after the merge
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2019-02-19 18:55:18 +01:00 |
Benjamin Vedder
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a546cc4dd5
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Merge pull request #71 from paltatech/powerdesigns-dev
Powerdesigns dev
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2019-02-19 17:57:59 +01:00 |
Marcos Chaparro
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723abcb09f
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Remove ST DAC library and use the DAC by direct register access
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-19 11:40:49 -03:00 |
Marcos Chaparro
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761c490fdd
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Calculate deadtime for gpdrive.c
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-19 11:01:28 -03:00 |
Marcos Chaparro
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93ebffa2ee
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Avoid watchdog resets if CAN is not used
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-19 10:59:38 -03:00 |
Marcos Chaparro
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b344e873b6
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Remove duplicated flux linkage detection function
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-19 10:55:40 -03:00 |
Marcos Chaparro
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32cf05629d
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Resolve merge conficts with major 2019 release
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-18 20:25:52 -03:00 |
Benjamin Vedder
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123bb00ab4
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Major 2019 update
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2019-02-18 19:30:19 +01:00 |
Marcos Chaparro
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fe0984c5d1
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Add HW_VERSION_PALTA to CI build
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-02 12:12:47 -03:00 |
Marcos Chaparro
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80c34d17f6
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Add conf_general_calculate_deadtime declaration
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-02-01 07:03:37 -03:00 |
Marcos Chaparro
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c86d8c3dc3
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Increase traveis build coverage to most hardware versions
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-31 20:59:10 -03:00 |
Marcos Chaparro
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4ac69232d9
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Configure deadtime by just defining it in nanoseconds. Firmware will calculate the required DTG register value.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-31 00:51:35 -03:00 |
Marcos Chaparro
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9652231edb
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Allow to run PWM at frequencies multiples FOC loop to support applications with PWM running at 100+kHz.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-30 00:33:56 -03:00 |
Marcos Chaparro
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fa9ed8dc55
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Clearerr way to limit FOC loop frequency.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-29 16:05:47 -03:00 |
Marcos Chaparro
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c59dd2b2fc
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Fix shadowed variables. Add -Wshadow.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-28 16:52:02 -03:00 |
Marcos Chaparro
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884f626e63
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Restore capability of enabling parameter assertion of peripheral libraries
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-28 16:47:10 -03:00 |
Marcos Chaparro
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43dbe80de5
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Fix DAC init assertion
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-28 02:21:47 -03:00 |
Marcos Chaparro
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6010fceb24
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More README information and badges
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-27 01:20:13 -03:00 |
Marcos Chaparro
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6ca38bccbb
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Add Codacity code quality badge.
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-26 19:26:43 -03:00 |
Marcos Chaparro
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69bdc73536
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Put a safe limit on ADC ISR frequency to avoid kernel panics. Currently ADC ISR duration is around 26usec, it can not be executed at more than 38kHz
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-26 02:36:12 -03:00 |
Marcos Chaparro
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4178785c89
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Update README.md with Travis badge
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-25 20:07:33 -03:00 |
Marcos Chaparro
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e21bd56493
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Add Travis CI config file
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
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2019-01-25 19:39:59 -03:00 |
Marcos Chaparro
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e02324a802
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Shifting signed 32-bit value by 31 bits is undefined behaviour
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-25 00:09:08 -03:00 |
Marcos Chaparro
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12fcffb629
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Window Watchdog feed moved outside ADC ISR. Now it has the same coverage as the IWDG, with the extra capability of detecting that the timeout thread is running faster than expected.
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-24 13:16:28 -03:00 |
Marcos Chaparro
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17f97763c0
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Extend watchdog coverage with IWDG, a watchdog running from an independent LF oscillator. If any of the threads being monitored does not report for more than 12ms, a reset will be asserted. When a WDG reset happens, the user can see it in the fault logs from vesc tool
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-24 12:19:44 -03:00 |
Marcos Chaparro
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f1978ac5b4
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Stronger filtering on gate driver supply voltage sensing. Add that voltage to fault logs
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-18 19:03:53 -03:00 |
Marcos Chaparro
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834056a9e5
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Use ice40UP5K FPGA bitstream length
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-18 19:02:18 -03:00 |
Marcos Chaparro
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78c825ac08
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Use Benajmins flux linkage measurement
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-18 19:00:46 -03:00 |
Marcos Chaparro
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09ff1f1f8c
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Fix implicit-fallthrough Warnings using gcc directive /* Falls through. */
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-10 20:03:48 -03:00 |
Marcos Chaparro
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95d8f70f87
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Define on build-time some basic limits for this hardware
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-10 18:22:47 -03:00 |
Marcos Chaparro
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726c8302ef
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Do not write flash memory if MCU VDD is below 2.9V
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-10 11:14:00 -03:00 |
Marcos Chaparro
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8a91468fd8
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Add an abort mechanism to flux linkage detection in case the motor doesnt spin
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-10 11:13:21 -03:00 |
Marcos Chaparro
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add8b31975
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Always measure phase resistance with MaxPhaseAmps/2 for consistent automatic resistance measurement
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-08 20:30:55 -03:00 |
Marcos Chaparro
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08dd452c00
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Last commit asserted a FAULT_CODE_NONE but it shouldnt be used like that, it caused issues on boot
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-08 19:23:43 -03:00 |
Marcos Chaparro
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34bacefe99
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Configure Brown Out Reset to keep mcu under reset until VDD reaches 2.7V. Configure Programmable Voltage Detector to interrupt and log a fault when mcu VDD drops below 2.9V.
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-08 11:36:42 -03:00 |
Marcos Chaparro
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6dad2b1865
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Improve conf_general_measure_flux_linkage() user experience with simpler parameter request. Now it only asks for a duty % to measure at and a max rpm that prevents overspeeds. By default GUI will suggest measuring at 50% duty, but lower duty (and hence lower rpm) also work fine.
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-07 00:26:45 -03:00 |
Marcos Chaparro
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8152d61760
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New flux linkage measurement based on open loop FOC to spin up the motor. Removes all calls to BLDC mode to reach the requested erpm
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2019-01-05 19:24:42 -03:00 |
Marcos Chaparro
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89e6022698
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Gate driver supply voltage monitoring
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 20:03:12 -03:00 |
Marcos Chaparro
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e284d1ae5e
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Compensate for line-to-line measurement in FOC
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 18:41:10 -03:00 |
Marcos Chaparro
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400d9be3ed
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Add FPGA configuration on boot
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 17:56:21 -03:00 |
Marcos Chaparro
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0827837e5f
|
Fix disabling wrong ADC channels when DAC is enabled. Added ADC channel descriptions
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 12:43:49 -03:00 |
Marcos Chaparro
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525cbfd160
|
Generate 12MHz clock for FPGA
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 12:37:50 -03:00 |
Marcos Chaparro
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54ba37b098
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Update transfer functions for voltage and current measurements
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
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2018-12-12 12:10:41 -03:00 |
Marcos Chaparro
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bfe1f0dedb
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Add DAC support
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
|
2018-12-12 12:04:43 -03:00 |
Marcos Chaparro
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4027a4ef8e
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Fault LED pin change
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
|
2018-12-12 11:41:24 -03:00 |
Benjamin Vedder
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43c3bbaf91
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FW 3.40: Added vesc id to mc_values
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2018-07-23 15:43:58 +02:00 |