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2865 Commits

Author SHA1 Message Date
Benjamin Vedder c76942009b Some fixes after the merge 2019-02-19 18:55:18 +01:00
Benjamin Vedder a546cc4dd5
Merge pull request #71 from paltatech/powerdesigns-dev 
Powerdesigns dev
 2019-02-19 17:57:59 +01:00
Marcos Chaparro 723abcb09f Remove ST DAC library and use the DAC by direct register access 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 11:40:49 -03:00
Marcos Chaparro 761c490fdd Calculate deadtime for gpdrive.c 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 11:01:28 -03:00
Marcos Chaparro 93ebffa2ee Avoid watchdog resets if CAN is not used 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 10:59:38 -03:00
Marcos Chaparro b344e873b6 Remove duplicated flux linkage detection function 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-19 10:55:40 -03:00
Marcos Chaparro 32cf05629d Resolve merge conficts with major 2019 release 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-18 20:25:52 -03:00
Benjamin Vedder 123bb00ab4 Major 2019 update 2019-02-18 19:30:19 +01:00
Marcos Chaparro fe0984c5d1 Add HW_VERSION_PALTA to CI build 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-02 12:12:47 -03:00
Marcos Chaparro 80c34d17f6 Add conf_general_calculate_deadtime declaration 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-02-01 07:03:37 -03:00
Marcos Chaparro c86d8c3dc3 Increase traveis build coverage to most hardware versions 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-31 20:59:10 -03:00
Marcos Chaparro 4ac69232d9 Configure deadtime by just defining it in nanoseconds. Firmware will calculate the required DTG register value. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-31 00:51:35 -03:00
Marcos Chaparro 9652231edb Allow to run PWM at frequencies multiples FOC loop to support applications with PWM running at 100+kHz. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-30 00:33:56 -03:00
Marcos Chaparro fa9ed8dc55 Clearerr way to limit FOC loop frequency. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-29 16:05:47 -03:00
Marcos Chaparro c59dd2b2fc Fix shadowed variables. Add -Wshadow. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 16:52:02 -03:00
Marcos Chaparro 884f626e63 Restore capability of enabling parameter assertion of peripheral libraries 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 16:47:10 -03:00
Marcos Chaparro 43dbe80de5 Fix DAC init assertion 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-28 02:21:47 -03:00
Marcos Chaparro 6010fceb24 More README information and badges 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-27 01:20:13 -03:00
Marcos Chaparro 6ca38bccbb Add Codacity code quality badge. 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-26 19:26:43 -03:00
Marcos Chaparro 69bdc73536 Put a safe limit on ADC ISR frequency to avoid kernel panics. Currently ADC ISR duration is around 26usec, it can not be executed at more than 38kHz 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-26 02:36:12 -03:00
Marcos Chaparro 4178785c89 Update README.md with Travis badge 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-25 20:07:33 -03:00
Marcos Chaparro e21bd56493 Add Travis CI config file 
Signed-off-by: Marcos Chaparro <mchaparro@powerdesigns.ca>
 2019-01-25 19:39:59 -03:00
Marcos Chaparro e02324a802 Shifting signed 32-bit value by 31 bits is undefined behaviour 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-25 00:09:08 -03:00
Marcos Chaparro 12fcffb629 Window Watchdog feed moved outside ADC ISR. Now it has the same coverage as the IWDG, with the extra capability of detecting that the timeout thread is running faster than expected. 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-24 13:16:28 -03:00
Marcos Chaparro 17f97763c0 Extend watchdog coverage with IWDG, a watchdog running from an independent LF oscillator. If any of the threads being monitored does not report for more than 12ms, a reset will be asserted. When a WDG reset happens, the user can see it in the fault logs from vesc tool 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-24 12:19:44 -03:00
Marcos Chaparro f1978ac5b4 Stronger filtering on gate driver supply voltage sensing. Add that voltage to fault logs 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-18 19:03:53 -03:00
Marcos Chaparro 834056a9e5 Use ice40UP5K FPGA bitstream length 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-18 19:02:18 -03:00
Marcos Chaparro 78c825ac08 Use Benajmins flux linkage measurement 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-18 19:00:46 -03:00
Marcos Chaparro 09ff1f1f8c Fix implicit-fallthrough Warnings using gcc directive /* Falls through. */ 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-10 20:03:48 -03:00
Marcos Chaparro 95d8f70f87 Define on build-time some basic limits for this hardware 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-10 18:22:47 -03:00
Marcos Chaparro 726c8302ef Do not write flash memory if MCU VDD is below 2.9V 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-10 11:14:00 -03:00
Marcos Chaparro 8a91468fd8 Add an abort mechanism to flux linkage detection in case the motor doesnt spin 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-10 11:13:21 -03:00
Marcos Chaparro add8b31975 Always measure phase resistance with MaxPhaseAmps/2 for consistent automatic resistance measurement 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-08 20:30:55 -03:00
Marcos Chaparro 08dd452c00 Last commit asserted a FAULT_CODE_NONE but it shouldnt be used like that, it caused issues on boot 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-08 19:23:43 -03:00
Marcos Chaparro 34bacefe99 Configure Brown Out Reset to keep mcu under reset until VDD reaches 2.7V. Configure Programmable Voltage Detector to interrupt and log a fault when mcu VDD drops below 2.9V. 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-08 11:36:42 -03:00
Marcos Chaparro 6dad2b1865 Improve conf_general_measure_flux_linkage() user experience with simpler parameter request. Now it only asks for a duty % to measure at and a max rpm that prevents overspeeds. By default GUI will suggest measuring at 50% duty, but lower duty (and hence lower rpm) also work fine. 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-07 00:26:45 -03:00
Marcos Chaparro 8152d61760 New flux linkage measurement based on open loop FOC to spin up the motor. Removes all calls to BLDC mode to reach the requested erpm 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2019-01-05 19:24:42 -03:00
Marcos Chaparro 89e6022698 Gate driver supply voltage monitoring 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 20:03:12 -03:00
Marcos Chaparro e284d1ae5e Compensate for line-to-line measurement in FOC 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 18:41:10 -03:00
Marcos Chaparro 400d9be3ed Add FPGA configuration on boot 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 17:56:21 -03:00
Marcos Chaparro 0827837e5f Fix disabling wrong ADC channels when DAC is enabled. Added ADC channel descriptions 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 12:43:49 -03:00
Marcos Chaparro 525cbfd160 Generate 12MHz clock for FPGA 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 12:37:50 -03:00
Marcos Chaparro 54ba37b098 Update transfer functions for voltage and current measurements 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 12:10:41 -03:00
Marcos Chaparro bfe1f0dedb Add DAC support 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 12:04:43 -03:00
Marcos Chaparro 4027a4ef8e Fault LED pin change 
Signed-off-by: Marcos Chaparro <mchaparro@paltatech.com>
 2018-12-12 11:41:24 -03:00
Benjamin Vedder 43c3bbaf91 FW 3.40: Added vesc id to mc_values 2018-07-23 15:43:58 +02:00
Benjamin Vedder a20c35b338 FW 3.39: AUX pin support, some refactoring 2018-07-06 21:20:54 +02:00
Benjamin Vedder 9639780ed4 Rebuilt firmwares 2018-04-22 12:19:13 +02:00
Benjamin Vedder beea1c8604 FW 3.38: Fixed temperature limit bug 2018-04-22 12:13:08 +02:00
Benjamin Vedder 92a54246f0 DRV and terminal refactoring, DRV8320 updates 2018-04-14 16:28:51 +02:00