Problem:
* in edge-case scenarios the tx empty interrupt was still enabled after a
transmission was finished. This would lead to endless interrupt tail
chaining that completely starved the system.
Solution:
* all irqs are now disabled at the end of a transaction by default
Error handling:
* all error condition irqs like over and underruns of tx and rx fifos
are now enabled and handled with an wake-up of the sleeping thread
plus disabling of all irqs
Optimizations:
* irq status register is only read once for evalutation in the irq
handler
* better utilization of the rx fifos during reception, which are now only
read if all data has been successfully received.
All individual RP2040 PWM channels are mapped onto distinct ChibiOS PWM
drivers, as this fits driver model which wants an independent timer per
driver.
There were two problems with the previous pin assignments:
1. Due to a copy-and-past error, the pins 13 and 14 were mapped as AF for all ports instead of GPIOA (for SWD) only.
2. All free pins were assigned as analog inputs. This limits the maximum input voltage to +4V (see STM32F411xE datasheet, Table 11), making otherwise 5V-tolerant pins prone to latch-up.
* import helper header
* seperate usb buf init
* move usb init in chibios driver
handle the address set in a more elegant way
* clean up some code
move through sn32_usb
use macros for ep dir
* handle the setup interrupt
* report back the frame no
wake up directly
* further deviate from usbhw.c
call registers directly
use chibios for reset
interrupt party time
* flag update
* switch n/ack to simple macros
* even more native
* bye sonix mess
* bring functions up to the docs
* usb stop, setup error handling
* further cleanup
remove dead code
cleanup headers
add missing connect/dc functionality
bring ep0 init to platform correct
* usb restart is now working
* attempt to fix wakeup
* no more delay on init
* fix the usb wakeup
* improve the wakeup
* make sure the direction is not set before init
* only mess with one ep
* need to enable the bus override too in order to control it
* driver block checks
* allow wakeup time override
* dynamic sram allocation
* remove useless ep naming
* testing: remove packet limits
* guard all i/o ops
* better wakeup/suspend handling
* remove dead code
* code cleanup
* make sure all ep's are handled
When starting a receive operation on an out endpoint it has to be
configured before the out interrupt occurs, or otherwise a sequence
error is the result.
* sn32: 2xx: centralize peripheral clock functions
* sn32: export HCLK for all boards
* sn32: support tickless mode for systick
* sn32: CT: cleanup inclusions
* Revert "sn32: export HCLK for all boards"
This reverts commit 1cae8892e3ce908ef89774a7e83bb921ecd810fc.
* sn32: export HCLK in hal level
* ST: inherit the SN32_HCLK
* 2xx lld: include ct header
* ST: fix systime type
* ST: interrupt should be disabled on init
* st: cleanup
* debug it
* Revert "debug it"
This reverts commit 1dd78e81019aa1233f3402ed251428085470ab79.
* sn32f2xx: make sure clocks match and proper timer init
* add more checks
* always read 32 bits from the counter
* read the first 16 bits directly
* systime_t is 16bits, but MR0 lives in a 32bit register
* testing: use ILRC
* testing: hack
* Revert "testing: hack"
This reverts commit 3821173dd9a6180e3f91a3e81e73e9f92385e273.
* Revert "testing: use ILRC"
we can't do this because hardware limits
This reverts commit 19d3ffefbce8cdd5cd34859cd8befccda6353e58.
* fix assert
* test: hardcode it
* Revert "test: hardcode it"
This reverts commit a75777c44d12844eb0be44c650a1de1602cadaed.
Fabien Poussin
Joy
plewka
Stefan Kerkmann
fauxpark
Tim Rheinfels
dexter93
Hanya
1Conan
IsaacDynamo