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1168 Commits

Author SHA1 Message Date
Alex Lewontin 5935e97262
Merge pull request #289 from elfmimi/nuc123-usb-workaround 
NUMICRO: Workaround for NUC123 USB Endpoint 6 problem
 2021-09-03 19:41:08 -07:00
Hanya 4315298f40 Fix next channel calculation 2021-09-03 15:49:02 +09:00
Hanya af3b8d6070 Add ADC low level driver for RP2040 2021-09-02 22:26:14 +09:00
Hanya 8bc249f5d6 Remove unused code to solve merge conflict 2021-08-30 13:30:13 +09:00
bwisn 41f2485356 HT32: add missing fields in USBEndpointConfig, to make it compatible with STM32 2021-08-29 16:40:05 +02:00
Hanya fc097fa6ac Add flag default 2021-08-29 15:36:05 +09:00
Hanya e6c771a989 Add flag to disable error data sequence interrupt 2021-08-29 11:33:35 +09:00
Hanya 0458091d42 Fix no need to reset endpoint here 2021-08-29 10:54:29 +09:00
Ilya Zhuravlev 182c3545e5 prepare out endpoint once, not on every call to usb_lld_start_out 2021-08-28 19:26:20 -04:00
Ilya Zhuravlev b8934a2c9e fix sending data 2021-08-28 14:35:31 -04:00
bwisn 4568901a91 ht32: fix GCC 11 misleading indentation error 2021-08-28 10:23:24 -03:00
Hanya 3ac83b6f69 Merge PR from xyzz 2021-08-28 20:38:22 +09:00
Hanya d98bf4c347 Fix set buffer control 2021-08-27 19:20:42 +09:00
Ilya Zhuravlev b8d011c927 fix buffer offset calculation sending wrong data 
it didn't include offset from base to USB_DPSRAM->DATA so with offset=0
it ended up sending back stale setup packet data
 2021-08-26 23:01:49 -04:00
Ilya Zhuravlev 76053315d9 fix some usb bugs 
now it can enumerate
 2021-08-26 00:51:33 -04:00
Hanya fea5fe0b5b Add USB driver, not working well 2021-08-25 20:15:28 +09:00
Fabien Poussin e762f8f765
Merge pull request #288 from KarlK90/gd32vf103-fix-adc-dma 
[GD32VF103] Fix ADC0 DMA stream mapping
 2021-08-16 11:10:20 +02:00
Ein Terakawa a94fead246 Workaround for NUC123 USB Endpoint 6 problem 2021-08-08 22:26:44 +09:00
Alex Lewontin 2935adef79
Create usb_memcpy.S 2021-08-04 00:52:06 -04:00
Ein Terakawa 7bc8efaee4 NUMICRO: Fix trivial but hard to find errors in USB LLD 2021-08-02 21:58:26 +09:00
Stefan Kerkmann e4790d23ae Fix ADC0 DMA stream mapping 2021-07-23 14:05:15 +02:00
Fabien Poussin 1310a8ce93
Merge pull request #287 from snazarkin/crc-patch-1 
Don't include SW CRC if not requested
 2021-07-21 21:00:09 +02:00
Fabien Poussin aa89629d2f
Merge pull request #285 from AndruPol/chibios-20.3.x 
fixed erase in hal_efl_lld
 2021-07-21 14:00:35 +02:00
snazarkin 3404e4d270
Don't include SW CRC if not requested 
I've got build failure when enable CRC module on STM32. The reason is SW CRC header is included by default  but not by compiler if ChibiOS-Contrib/os/various/ is not included into search path.
The fix includes only requested LL header.
 2021-07-19 16:56:32 +03:00
José Simões e93de09f00 Replace packed struct definition with CMSIS one 2021-07-12 18:18:43 +01:00
andru 4ace726d62 fixed erase in hal_efl_lld 2021-07-10 20:58:37 +03:00
Fabien Poussin 34591368db
Merge pull request #284 from dron0gus/crc-fix 
STM32: crc lld: in reversal mode should be changed for tailing half-word and byte
 2021-07-10 17:08:30 +02:00
Fabien Poussin c9ea245068
Merge pull request #282 from AndruPol/chibios-20.3.x 
nrf52 drivers
 2021-07-10 16:57:09 +02:00
Andrey Gusakov d4a0d9f0a9 STM32: crc lld: in reversal mode should be changed for tail 2021-07-05 23:25:28 +03:00
Stefan Kerkmann 24ec55baa7 Free B4 pin on Longan Nano Board 
By default B4 has the JTAG NJRST signal with a pull up enabled. On the longan Nano
this PIN is broken out as a regular pin. So we just disable NJRST by default
and make it available as a regular GPIO.
 2021-07-03 13:50:03 +02:00
Stefan Kerkmann 1021a7771f Rename missed AFIO register names 2021-07-03 13:45:27 +02:00
andru 2fab47aa3b fixed get_descriptor 2021-07-03 07:34:59 +03:00
andru 9fd3837bbf changed gpt, added efl driver 2021-07-03 06:26:36 +03:00
Fabien Poussin 3fc7254ad3
Merge pull request #280 from fauxpark/kinetis-ldscripts 
Add flash4-7 to MK64FX512 and MK66FX1M0 ldscripts
 2021-06-30 10:06:06 +02:00
Fabien Poussin f54249ae9a
Merge pull request #281 from AndruPol/chibios-20.3.x 
added nrf52 uart driver, changed icu, radio drivers
 2021-06-30 00:59:10 +02:00
Fabien Poussin 172b9c344f
Merge pull request #279 from KarlK90/risc-v-irq-preemption-rv32e-support 
[RISC-V ECLIC] Add RV32E support and fix context switching in case of pre-empted interrupts
 2021-06-30 00:56:55 +02:00
Fabien Poussin 7ea6f3e8e4
Merge branch 'chibios-20.3.x' into kinetis-ldscripts 2021-06-30 00:54:54 +02:00
a_p_u_r_o d2ecd3c530
Merge branch 'chibios-20.3.x' into numicro-gross-fix 2021-06-28 22:00:36 +09:00
andru 3dfa6a5905 added nrf52 uart driver, changed icu, radio drivers 2021-05-14 22:04:00 +03:00
fauxpark c9d507e687 Add flash4-7 to MK64FX512 and MK66FX1M0 ldscripts 2021-05-14 21:58:12 +10:00
Stefan Kerkmann b5d78c64c4 Add RV32E support 
* Make SP 16 byte aligned as the risc-v abi wants it.
* Correct IRQ context check.
 2021-05-10 10:16:54 +02:00
Stefan Kerkmann 5e096e01c9 Context switch only on irq tail 2021-05-09 11:16:09 +02:00
Stefan Kerkmann 0a66a0660b Fix t0 restore when exiting interrupt 
An oversight when arrangeing the code according to the nucleisys docs,
t0 was overriden with the value of msubm and never actually restored. To
fix the issue we restore the csrs after the general purpose registers.
The offical docs want it the other way around but this should be fine as
well, as the interrupts are still globaly disabled at this point.
 2021-04-25 13:23:47 +02:00
Stefan Kerkmann e64aa96319 Fix Longan Nano Red LED define 2021-04-20 22:04:07 +02:00
Stefan Kerkmann 0daa76501f Add crc driver for gd32vf103 2021-04-20 15:09:07 +02:00
Stefan Kerkmann 9a64f5c17c Force machine mode on interrupt exit for context switches 
The first attempt to solve illegal instruction expections was made in commit
b875108cd0
 It seemed as this "fixed" the issue, but merely added delays in the code
 which prevented the error to appear in lucky circumstances. Interesting that this code worked in the first place.

Root cause for the expections where write attempts to mstatus in
user privilege mode which raised the illegal instruction exception which
is in spec with the risc-v privileged isa and documented in the
bumbleebee core architecture manual by nucleisys. The solution is
to never enter user mode by forceing mcause.mpp to 0x3
before calling mret when exiting the interrupt handler
for context switching.
 2021-04-17 19:36:44 +02:00
Stefan Kerkmann c1dfb65aa0 Revert "Add R/W memory and instruction barrier after mstatus access" 
This reverts commit b875108cd0.
 2021-04-16 21:52:41 +02:00
Fabien Poussin e9657f6468
Merge branch 'chibios-20.3.x' into gd32vf103-i2c-fix 2021-04-16 16:32:30 +02:00
Stefan Kerkmann b875108cd0 Add R/W memory and instruction barrier after mstatus access 
Fast subsequent reads and writes to the mstatus csr lead to
illegal instruction exceptions on the nucleisys bumblee core
of the gd32vf103. This behavior only occurred in high load
situations e.g. interrupt frequency of 5khz but reliably let
to these errors.  Adding the instruction and memory barriers solved
the problem. There is some negligible performance impact.
 2021-04-16 16:10:08 +02:00
Stefan Kerkmann 863082ac44 Remove unnecessary if clause 2021-04-15 14:49:43 +02:00
Stefan Kerkmann 764203444a Move DMA enable to init code, re-add spurious bus error clearance 2021-04-14 22:16:40 +02:00
a_p_u_r_o 6747713b04
Merge branch 'chibios-20.3.x' into nuc123-efl-fix 2021-04-08 20:17:24 +09:00
Fabien Poussin 92eaded978
Merge branch 'chibios-20.3.x' into usbendpoints 2021-04-06 22:09:08 +02:00
Stefan Kerkmann 31f37e99b0 Fix VBUSSENS for Longan Nano 2021-04-06 14:23:27 +02:00
Stefan Kerkmann 35a04fc72c Add myself to copyright notes :-) 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d783126f55 Remove duplicate defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann b32f8bbeac Move ECLIC IRQ triggers to driver files 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 5557082177 Update longan nano board 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 6e2b7317b0 Fix periodic tick timer 2021-04-06 13:38:23 +02:00
Stefan Kerkmann e90664f460 Add Sipeed Longan Nano Board 2021-04-06 13:38:23 +02:00
Stefan Kerkmann fcb66ed300 Add previously undefined constants 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 2463c10bd6 Explicitly define all capabilities in gd32registry 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f39fb50760 Correct default values and usb prescaler defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 5dc6aa1d41 Add SystemCoreClock again 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 3c39240a6c Rename STM32 to GD32 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f093fe58b5 Remove STM32 registry 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 93c9c69644 Merge HAL files 2021-04-06 13:38:23 +02:00
Stefan Kerkmann cf2e6d4cea Rename CMSIS header file to gd32vf103.h 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 4206c0469d Remove unused RCU_CFG1 defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann e6822d95ed Rename RCU registers 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 9ef3cfcc3d Rename RCU_AHBENR 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 7262f2ed74 Rename RCU APB1RSTR register and remove unused peripherals 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f6d7eda01b Renumber SPI RCU defines to begin at 0 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d304133046 Rename RCU_CIR and RCU_APB2RST registers 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 302e61bdcf Remove unused USB OTG Defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d25731f7cf Delete unused exti and control defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 387ccb8dea Renumber ADC peripherals to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 2cd74f3ea2 Replace GD32_DAC_DAC with GD32_DAC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c7e847a17a Rename DAC1 to just DAC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 389dbc2514 Remove unified can interrupts which are not present on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4ec485fdab Renumber CAN peripherals to start from 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b047b96764 Revert "remove 5..9 handler" 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0104b80b23 GD32VF103 define rename 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 94397bdc43 Rename EXTI15_10 to EXTI10_15 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b507bafbef Rename missed adc registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann a3b80a3b3d Rename EXTI registers, remove 5..9 handler 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 35256724ba Rename f105 hal to gd32vf103 hal 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 1ea62bc82b Rename RCU pll clock names 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 7636389126 Rename STM32 clocks to GD32 names 
HSE -> HXTAL
LSE -> LXTAL
HSI -> IRC8M
LSI -> IRC40K
 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b8f128c86c Rename EXMC -> FSMC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann cc58c381f3 Rename BKP registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 53ddaa399b Rename PMU register defines 2021-04-06 13:38:22 +02:00
Stefan Kerkmann fcb2d49c25 Rename STM32F1xx -> GD32VF103 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 116f34b808 Rename PWR -> PMU 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4eef25ac2a Rename RCU registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 66e83a4685 Rename RCC -> RCU 2021-04-06 13:38:22 +02:00
Stefan Kerkmann da97c812e5 Rename FLASH registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4aa9da0f34 Rename ADC registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 14a840f775 Use NMSIS functions for periodic systick handling 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0fb4a9b7d7 Renumber TIM to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b2d27ad990 Remove timers not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3cfa2c8002 Rename TIM registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann a421b9821b Rename Independent Watchdog registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4f93d001a4 Renumber SPI to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c384a54401 Remove I2S Peripherals not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3fb341f7a3 Rename i2s registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann bdc648d46b Rename SPI registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ccaf60ac66 Rename RTC registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b4dd59eae6 Remove DAC features not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 454aaddcee Rename missing DAC register definitions 2021-04-06 13:38:22 +02:00
Stefan Kerkmann f48ec44d50 Rename DAC peripheral registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 07e53487e9 Rename missing CAN registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 004ed9d005 CAN Register renames 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 8539fe76bc Add POC GD32 overclocking flags 2021-04-06 13:38:22 +02:00
Stefan Kerkmann cfdbcfe8d9 Remove CAN peripheral not present on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 8d45fbc68c Revert AFIO USART remapping register changes 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c9cbc6d03c No DMA for UART4 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 9ffb8cf58c Rename UARTx to start at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3edcc0f80b Rename USARTx to start at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 031cd8325f Remove USART peripherals not present in this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 9ddf61ae87 Rename USART registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 22b8934b7f Rename I2C2 -> I2C1 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ff5541e6c7 Rename I2C1 -> I2C0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ef39596f92 Add i2c fast mode plus 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 1aa20a7fa6 Correct DMA channel macros to start from 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 7178909bb1 Remove STM32F1x specific checks 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 73949757f4 Add fast mode plus stub 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0058d3df0b Rename I2C registers, add fast mode plus register 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 5a3ca17dd3 Remove I2C3 peripheral, as it isn't present in this chip 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 6f1d0ca1b4 Rename missed register, fix rename bug, otg done 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 27551a2282 Rename OTG device registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3839d682cf Rename missing otg host registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3ef423ca8f Remove otg stepping, continue rename registers usbfs 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 05a0aab253 Remove OTG definitions, those are present in gd32_otg.h 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 9dace8a9ce Rename otg -> usbfs 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3a51ec0bf3 Rename OTG1 -> USBFS 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b8976b4fb5 Remove USB HS peripheral, start rename registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 11e6646370 Remove SD card interface defines 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 29be2ac3c3 Rename AFIO register definitions 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 2da7835bde Rename GPIO registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 6a3caa697a GPIO Remove obsolete ports, rename registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann adb9afc02b Rename DMA CNDTR CPAR CMAR registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 5cec991524 Rename DMA CCR -> CTL 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 51b420e395 DMA rename IFCR -> INTC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 186264dece Rename DMA ISR register to INTF 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 962770882f Rename DMA interrupt flags 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 1d3f664311 Add renumbered dma channel definitions 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 92646d6824 Rename DMA2 -> DMA1 and channels to start at zero 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 161449d7c3 Rename DMA1 -> DMA0 and channels to start at zero 2021-04-06 13:38:22 +02:00
Stefan Kerkmann f53e5a8b44 Remove DMA features not found on gd32vf103 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 7d90a998bf Sort and deduplicate trigger handlers 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 352a6021f1 Rename stm32_ to gd32_ , remove obsolete tim headers 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 73336cf3b6 Increase idle stacksize, add isr locking/unlocking 2021-04-06 13:38:21 +02:00
Stefan Kerkmann a9a4e46916 Replace STM32_ with GD32_ 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 3467aa8ffe Add STM32 HAL Drivers, already adjusted for eclic interrupts 2021-04-06 13:38:21 +02:00
Stefan Kerkmann ecf1e48c89 Add platform makefile 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 6b195cfc59 Add GD32 registry STM32 renames will follow 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 479375a731 Add eclic system reset 2021-04-06 13:38:21 +02:00
Stefan Kerkmann a44a68bf7d Add eclic interrupt driver 2021-04-06 13:38:21 +02:00
Stefan Kerkmann 5abb73e524 Migrate port and startup code to nmsis 2021-04-06 13:38:21 +02:00
Stefan Kerkmann bb7a299638 Add RISC-V ECLIC startup and port files 2021-04-06 13:38:21 +02:00
Stefan Kerkmann b729125bdd Add Nucleisys NMSIS sources 2021-04-06 13:38:21 +02:00
Michael Stapelberg 2eb784da6d MIMXRT1062/LLD/USBHSv1: increase USB_DEVICE_CONFIG_ENDPOINTS 
It should match USB_MAX_ENDPOINTS, but cannot be defined to be USB_MAX_ENDPOINTS
without modifying other NXP SDK files, which I would like to avoid for easier
maintenance.

Instead, we add a preprocessor check where we have both of them defined and
ensure that they match this way :)
 2021-04-05 09:00:40 +02:00
Michael Stapelberg a8a9e75aec branch usb_device_config.h from new project wizard template 
no changes yet
 2021-04-05 08:51:39 +02:00
Michael Stapelberg 4df9abffc5 MIMXRT1062/LLD/PITv1: switch to internal SysTick clock (600 MHz ARM) 
See the comment in the code for rationale.
 2021-04-04 15:12:14 +02:00
Ein Terakawa 0b84e93734 Follow-up fix to alexclewontin's nuc123-kvs-example 2021-04-03 10:38:49 +09:00
a_p_u_r_o 9a861b0e8c
Merge branch 'chibios-20.3.x' into nuc123-kvs-example 2021-04-03 08:58:28 +09:00
a_p_u_r_o 720eabbf18
Merge branch 'chibios-20.3.x' into numicro-gross-fix 2021-04-01 10:18:01 +09:00
Michael Stapelberg 9f939cec5a MIMXRT1062/LLD/USBHSv1: implement hal_usb_lld for MIMXRT1062 2021-03-31 14:04:12 +02:00
Michael Stapelberg 119de824fe MIMXRT1062/LLD/GPIOv1: implement hal_pal_lld for MIMXRT1062 2021-03-31 13:59:00 +02:00
Michael Stapelberg 22b4ec3b6b MIMXRT1062: hal: port Arduino Teensy 4 Core startup code and linker script 
The one oddity of this platform is that it requires using XIP (eXecute In
Place), which for us largely means setting up a few special sections at special
flash locations.

References:
https://www.nxp.com/docs/en/application-note/AN12107.pdf
https://github.com/PaulStoffregen/cores/blob/master/teensy4/imxrt1062_t41.ld
https://www.pjrc.com/store/teensy40.html#memory_layout
 2021-03-31 13:59:00 +02:00
Michael Stapelberg 334fe4f499 enable USB1 peripheral clock in MCUXpresso v11.3.0 2021-03-31 13:59:00 +02:00
Michael Stapelberg 5cb023f629 branch mcux-sdk/boards/evkmimxrt1060/clock_config.[ch] from 66fdc6ff 2021-03-31 13:59:00 +02:00
Michael Stapelberg b8c2392b13 MIMXRT1062: kinetis_registry: adjust IRQ numbers for i.MX RT1062 2021-03-31 13:59:00 +02:00
Michael Stapelberg b11181c154 MIMXRT1062/LLD/UARTv1: implement hal_serial_lld for MIMXRT1062 2021-03-31 13:59:00 +02:00
Michael Stapelberg a96c5d87d8 cmparams: set correct ARM version and number of vectors 2021-03-27 16:03:55 +01:00
Michael Stapelberg 1788a7468c MIMXRT1062/LLD/PITv1: hal_st: set up SysTick like the Arduino Teensy 4 Core does 2021-03-27 16:03:55 +01:00
Michael Stapelberg f19da3e183 replace file names to use MIMXRT1062 2021-03-27 16:03:55 +01:00
Michael Stapelberg 480534795c copy LLD from KINETIS HAL (no changes yet) 2021-03-27 16:03:55 +01:00
Michael Stapelberg b4b3579c86 branch startup (no changes yet) 2021-03-27 16:03:55 +01:00
Michael Stapelberg 92b862cdd0 copy os/hal/ports/MIMXRT1062 from ../KINETIS/MK66F18 (no changes yet) 2021-03-27 16:03:55 +01:00
Michael Stapelberg 7bb5555a06 branch PJRC_TEENSY_4_1 board from _3_6 (no changes yet) 2021-03-27 16:03:55 +01:00
Ein Terakawa a28dbca5eb Allow small error with BAUDRATE for NUC123 SERIAL driver 2021-03-21 10:07:41 +09:00
Ein Terakawa 2ae07ab811 Add NUC123xxxAEx variant support for NUC123 SERIAL driver 2021-03-21 10:04:44 +09:00
Fabien Poussin 6683eaffb1
Update CRC for master branch 2021-03-20 23:20:15 +01:00
Ein Terakawa 78977a7c10 Fix the case when only UART1 is used 2021-03-06 15:53:20 +09:00
Ein Terakawa e8fc38f289 Use NUC123_UARTx_NUMBER 2021-03-06 15:53:20 +09:00
Ein Terakawa 4e67004797 Fix UART0 ALT_MFP setup for PB2 2021-03-06 15:53:20 +09:00
Ein Terakawa af65e7bb01 Map PAL_MODE_INPUT_PULLUP to GPIO_PMD_QUASI 2021-03-06 15:52:30 +09:00
Matthew Kennedy 609b49a312 configurable MSD options 2021-03-04 17:08:41 -08:00
Fabien Poussin e7cdad3d1a
Merge pull request #263 from mck1117/fix-msd-lun 
don't deref null pointer on MSD LUN request
 2021-02-24 20:27:49 +01:00
Matthew Kennedy 1ebdcca467 don't deref nullptr 2021-02-23 23:29:45 -08:00
Alex Lewontin e4ae11e8c6
NUC123: Dynamic CONFIG value read 2021-02-23 15:40:18 -05:00
Alex Lewontin c328f805c2
NUC123: Added CONFIG enabling switch 2021-02-23 15:40:18 -05:00
Alex Lewontin 4cbc3250c0
NUC123: EFL driver 2021-02-14 14:34:24 -05:00
Alex Lewontin 09394a1b1a
NUC123: Added CONFIG0/1 settings, and updated linker script 2021-02-14 14:34:24 -05:00
Fabien Poussin 26f24c19b3
fix Segger Sysview bindings 2021-02-14 13:12:05 +01:00
Fabien Poussin c0b5cfab75
Merge pull request #251 from sabdulqadir/feat/expanding_hal_nand_c 
Expansion to nand flash driver
 2021-02-14 12:18:20 +01:00
Ein Terakawa a9e2c509b5 Switch to PAL_NEW_INIT 2021-02-14 12:19:11 +09:00
Ein Terakawa 82e1ef05a2 Remove MFP manipulation from hal_pal_lld.c 2021-02-14 12:19:11 +09:00