e9657f6468
Merge branch 'chibios-20.3.x' into gd32vf103-i2c-fix
2021-04-16 16:32:30 +02:00
b875108cd0
Add R/W memory and instruction barrier after mstatus access
...
Fast subsequent reads and writes to the mstatus csr lead to
illegal instruction exceptions on the nucleisys bumblee core
of the gd32vf103. This behavior only occurred in high load
situations e.g. interrupt frequency of 5khz but reliably let
to these errors. Adding the instruction and memory barriers solved
the problem. There is some negligible performance impact.
2021-04-16 16:10:08 +02:00
863082ac44
Remove unnecessary if clause
2021-04-15 14:49:43 +02:00
764203444a
Move DMA enable to init code, re-add spurious bus error clearance
2021-04-14 22:16:40 +02:00
6747713b04
Merge branch 'chibios-20.3.x' into nuc123-efl-fix
2021-04-08 20:17:24 +09:00
92eaded978
Merge branch 'chibios-20.3.x' into usbendpoints
2021-04-06 22:09:08 +02:00
31f37e99b0
Fix VBUSSENS for Longan Nano
2021-04-06 14:23:27 +02:00
35a04fc72c
Add myself to copyright notes :-)
2021-04-06 13:38:23 +02:00
d783126f55
Remove duplicate defines
2021-04-06 13:38:23 +02:00
b32f8bbeac
Move ECLIC IRQ triggers to driver files
2021-04-06 13:38:23 +02:00
5557082177
Update longan nano board
2021-04-06 13:38:23 +02:00
6e2b7317b0
Fix periodic tick timer
2021-04-06 13:38:23 +02:00
e90664f460
Add Sipeed Longan Nano Board
2021-04-06 13:38:23 +02:00
fcb66ed300
Add previously undefined constants
2021-04-06 13:38:23 +02:00
2463c10bd6
Explicitly define all capabilities in gd32registry
2021-04-06 13:38:23 +02:00
f39fb50760
Correct default values and usb prescaler defines
2021-04-06 13:38:23 +02:00
5dc6aa1d41
Add SystemCoreClock again
2021-04-06 13:38:23 +02:00
3c39240a6c
Rename STM32 to GD32
2021-04-06 13:38:23 +02:00
f093fe58b5
Remove STM32 registry
2021-04-06 13:38:23 +02:00
93c9c69644
Merge HAL files
2021-04-06 13:38:23 +02:00
cf2e6d4cea
Rename CMSIS header file to gd32vf103.h
2021-04-06 13:38:23 +02:00
4206c0469d
Remove unused RCU_CFG1 defines
2021-04-06 13:38:23 +02:00
e6822d95ed
Rename RCU registers
2021-04-06 13:38:23 +02:00
9ef3cfcc3d
Rename RCU_AHBENR
2021-04-06 13:38:23 +02:00
7262f2ed74
Rename RCU APB1RSTR register and remove unused peripherals
2021-04-06 13:38:23 +02:00
f6d7eda01b
Renumber SPI RCU defines to begin at 0
2021-04-06 13:38:23 +02:00
d304133046
Rename RCU_CIR and RCU_APB2RST registers
2021-04-06 13:38:23 +02:00
302e61bdcf
Remove unused USB OTG Defines
2021-04-06 13:38:23 +02:00
d25731f7cf
Delete unused exti and control defines
2021-04-06 13:38:23 +02:00
387ccb8dea
Renumber ADC peripherals to begin at 0
2021-04-06 13:38:22 +02:00
2cd74f3ea2
Replace GD32_DAC_DAC with GD32_DAC
2021-04-06 13:38:22 +02:00
c7e847a17a
Rename DAC1 to just DAC
2021-04-06 13:38:22 +02:00
389dbc2514
Remove unified can interrupts which are not present on this device
2021-04-06 13:38:22 +02:00
4ec485fdab
Renumber CAN peripherals to start from 0
2021-04-06 13:38:22 +02:00
b047b96764
Revert "remove 5..9 handler"
2021-04-06 13:38:22 +02:00
0104b80b23
GD32VF103 define rename
2021-04-06 13:38:22 +02:00
94397bdc43
Rename EXTI15_10 to EXTI10_15
2021-04-06 13:38:22 +02:00
b507bafbef
Rename missed adc registers
2021-04-06 13:38:22 +02:00
a3b80a3b3d
Rename EXTI registers, remove 5..9 handler
2021-04-06 13:38:22 +02:00
35256724ba
Rename f105 hal to gd32vf103 hal
2021-04-06 13:38:22 +02:00
1ea62bc82b
Rename RCU pll clock names
2021-04-06 13:38:22 +02:00
7636389126
Rename STM32 clocks to GD32 names
...
HSE -> HXTAL
LSE -> LXTAL
HSI -> IRC8M
LSI -> IRC40K
2021-04-06 13:38:22 +02:00
b8f128c86c
Rename EXMC -> FSMC
2021-04-06 13:38:22 +02:00
cc58c381f3
Rename BKP registers
2021-04-06 13:38:22 +02:00
53ddaa399b
Rename PMU register defines
2021-04-06 13:38:22 +02:00
fcb2d49c25
Rename STM32F1xx -> GD32VF103
2021-04-06 13:38:22 +02:00
116f34b808
Rename PWR -> PMU
2021-04-06 13:38:22 +02:00
4eef25ac2a
Rename RCU registers
2021-04-06 13:38:22 +02:00
66e83a4685
Rename RCC -> RCU
2021-04-06 13:38:22 +02:00
da97c812e5
Rename FLASH registers
2021-04-06 13:38:22 +02:00
Fabien Poussin
Stefan Kerkmann
a_p_u_r_o